Simplify NPA context reading and writing by using hardware maximum context size instead of using individual sizes of each context type. Signed-off-by: Subbaraya Sundeep --- .../ethernet/marvell/octeontx2/af/rvu_npa.c | 20 ++++++++----------- .../marvell/octeontx2/af/rvu_struct.h | 6 ++++++ 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c index e2a33e46b48a..df783c4e5d75 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npa.c @@ -116,13 +116,11 @@ int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req, case NPA_AQ_INSTOP_WRITE: /* Copy context and write mask */ if (req->ctype == NPA_AQ_CTYPE_AURA) { - memcpy(mask, &req->aura_mask, - sizeof(struct npa_aura_s)); - memcpy(ctx, &req->aura, sizeof(struct npa_aura_s)); + memcpy(mask, &req->aura_mask, NIX_MAX_CTX_SIZE); + memcpy(ctx, &req->aura, NIX_MAX_CTX_SIZE); } else { - memcpy(mask, &req->pool_mask, - sizeof(struct npa_pool_s)); - memcpy(ctx, &req->pool, sizeof(struct npa_pool_s)); + memcpy(mask, &req->pool_mask, NIX_MAX_CTX_SIZE); + memcpy(ctx, &req->pool, NIX_MAX_CTX_SIZE); } break; case NPA_AQ_INSTOP_INIT: @@ -134,9 +132,9 @@ int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req, /* Set pool's context address */ req->aura.pool_addr = pfvf->pool_ctx->iova + (req->aura.pool_addr * pfvf->pool_ctx->entry_sz); - memcpy(ctx, &req->aura, sizeof(struct npa_aura_s)); + memcpy(ctx, &req->aura, NIX_MAX_CTX_SIZE); } else { /* POOL's context */ - memcpy(ctx, &req->pool, sizeof(struct npa_pool_s)); + memcpy(ctx, &req->pool, NIX_MAX_CTX_SIZE); } break; case NPA_AQ_INSTOP_NOP: @@ -196,11 +194,9 @@ int rvu_npa_aq_enq_inst(struct rvu *rvu, struct npa_aq_enq_req *req, /* Copy read context into mailbox */ if (req->op == NPA_AQ_INSTOP_READ) { if (req->ctype == NPA_AQ_CTYPE_AURA) - memcpy(&rsp->aura, ctx, - sizeof(struct npa_aura_s)); + memcpy(&rsp->aura, ctx, NIX_MAX_CTX_SIZE); else - memcpy(&rsp->pool, ctx, - sizeof(struct npa_pool_s)); + memcpy(&rsp->pool, ctx, NIX_MAX_CTX_SIZE); } } diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h index 8e868f815de1..1e51ed197b29 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h @@ -227,8 +227,12 @@ struct npa_aura_s { u64 fc_msh_dst : 11; u64 reserved_435_447 : 13; u64 reserved_448_511; /* W7 */ + /* Ensure all context sizes are 128 bytes */ + u64 padding[8]; }; +static_assert(sizeof(struct npa_aura_s) == NIX_MAX_CTX_SIZE); + struct npa_pool_s { u64 stack_base; /* W0 */ u64 ena : 1; @@ -285,6 +289,8 @@ struct npa_pool_s { u64 reserved_960_1023; /* W15 */ }; +static_assert(sizeof(struct npa_pool_s) == NIX_MAX_CTX_SIZE); + /* NIX admin queue completion status */ enum nix_aq_comp { NIX_AQ_COMP_NOTDONE = 0x0, -- 2.48.1