support get phy_leds_reg from spec register, and init the software node according to the value. Signed-off-by: Jijie Shao --- drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c | 12 ++++++++++-- drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h | 5 +++++ 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c b/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c index edd8ccefbb62..fb6ece3935e7 100644 --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_mdio.c @@ -289,9 +289,11 @@ static int hbg_register_phy_leds_software_node(struct hbg_priv *priv, struct phy_device *phydev) { struct fwnode_handle *fwnode = dev_fwnode(&phydev->mdio.dev); + u32 phy_reg_num = hbg_reg_read(priv, HBG_REG_PHY_LEDS_REG); struct device *dev = &priv->pdev->dev; struct hbg_mac *mac = &priv->mac; - u32 node_index = 0, i; + u32 node_index = 0, i, reg; + unsigned long rules; const char *label; int ret; @@ -310,12 +312,18 @@ static int hbg_register_phy_leds_software_node(struct hbg_priv *priv, mac->nodes[node_index++] = &mac->leds_node; for (i = 0; i < HBG_LED_MAX_NUM; i++) { + reg = (phy_reg_num >> (8 * i)) & 0xFF; + mac->leds_props[i][0] = PROPERTY_ENTRY_U32("reg", i); label = devm_kasprintf(dev, GFP_KERNEL, "%u", i); mac->leds_props[i][1] = PROPERTY_ENTRY_STRING("label", label); + rules = hbg_reg_read(priv, + HBG_REG_PHY_LED0_RULES_ADDR + i * 4); + mac->leds_props[i][2] = PROPERTY_ENTRY_U32("rules", rules); + mac->led_nodes[i].name = devm_kasprintf(dev, GFP_KERNEL, - "led@%u", i); + "led@%u", reg); mac->led_nodes[i].properties = mac->leds_props[i]; mac->led_nodes[i].parent = &mac->leds_node; diff --git a/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h b/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h index 30b3903c8f2d..2ad7b60874c7 100644 --- a/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h +++ b/drivers/net/ethernet/hisilicon/hibmcge/hbg_reg.h @@ -12,12 +12,17 @@ #define HBG_REG_MAC_ADDR_ADDR 0x0010 #define HBG_REG_MAC_ADDR_HIGH_ADDR 0x0014 #define HBG_REG_UC_MAC_NUM_ADDR 0x0018 +#define HBG_REG_PHY_LEDS_REG 0x0020 #define HBG_REG_MDIO_FREQ_ADDR 0x0024 #define HBG_REG_MAX_MTU_ADDR 0x0028 #define HBG_REG_MIN_MTU_ADDR 0x002C #define HBG_REG_TX_FIFO_NUM_ADDR 0x0030 #define HBG_REG_RX_FIFO_NUM_ADDR 0x0034 #define HBG_REG_VLAN_LAYERS_ADDR 0x0038 +#define HBG_REG_PHY_LED0_RULES_ADDR 0x003C +#define HBG_REG_PHY_LED1_RULES_ADDR 0x0040 +#define HBG_REG_PHY_LED2_RULES_ADDR 0x0044 +#define HBG_REG_PHY_LED3_RULES_ADDR 0x0048 #define HBG_REG_PUSH_REQ_ADDR 0x00F0 #define HBG_REG_MSG_HEADER_ADDR 0x00F4 #define HBG_REG_MSG_HEADER_OPCODE_M GENMASK(7, 0) -- 2.33.0