The existing code assumed the 88E6141/88E6341 did not have a dedicated ATU FID register because of its database count (256), instead taking the legacy path which resulted in the FID register never being set. This resulted in every FDB entry being loaded into FID 0, breaking VLAN aware bridging. Fixes: a75961d0ebfd ("net: dsa: mv88e6xxx: Add support for ethernet switch 88E6341") Assisted-by: Claude:claude-opus-4-8 Signed-off-by: Luke Howard --- drivers/net/dsa/mv88e6xxx/chip.c | 2 ++ drivers/net/dsa/mv88e6xxx/chip.h | 1 + drivers/net/dsa/mv88e6xxx/global1_atu.c | 4 ++-- 3 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c index 80b877c74513d..60d46680fb50e 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c @@ -5863,6 +5863,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .family = MV88E6XXX_FAMILY_6341, .name = "Marvell 88E6141", .num_databases = 256, + .atu_fid_reg = true, .num_macs = 2048, .num_ports = 6, .num_internal_phys = 5, @@ -6350,6 +6351,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = { .family = MV88E6XXX_FAMILY_6341, .name = "Marvell 88E6341", .num_databases = 256, + .atu_fid_reg = true, .num_macs = 2048, .num_internal_phys = 5, .num_ports = 6, diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index e966e7c4cc5de..9f23d2a7165f0 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -131,6 +131,7 @@ struct mv88e6xxx_info { u16 prod_num; const char *name; unsigned int num_databases; + bool atu_fid_reg; unsigned int num_macs; unsigned int num_ports; unsigned int num_internal_phys; diff --git a/drivers/net/dsa/mv88e6xxx/global1_atu.c b/drivers/net/dsa/mv88e6xxx/global1_atu.c index c47f068f56b32..aa5adc78607ca 100644 --- a/drivers/net/dsa/mv88e6xxx/global1_atu.c +++ b/drivers/net/dsa/mv88e6xxx/global1_atu.c @@ -135,7 +135,7 @@ static int mv88e6xxx_g1_atu_op(struct mv88e6xxx_chip *chip, u16 fid, u16 op) int err; /* FID bits are dispatched all around gradually as more are supported */ - if (mv88e6xxx_num_databases(chip) > 256) { + if (mv88e6xxx_num_databases(chip) > 256 || chip->info->atu_fid_reg) { err = mv88e6xxx_g1_atu_fid_write(chip, fid); if (err) return err; @@ -179,7 +179,7 @@ static int mv88e6xxx_g1_atu_fid_read(struct mv88e6xxx_chip *chip, u16 *fid) u16 val = 0, upper = 0, op = 0; int err = -EOPNOTSUPP; - if (mv88e6xxx_num_databases(chip) > 256) { + if (mv88e6xxx_num_databases(chip) > 256 || chip->info->atu_fid_reg) { err = mv88e6xxx_g1_read(chip, MV88E6352_G1_ATU_FID, &val); val &= 0xfff; if (err) -- 2.43.0