Add support for generating SPI interupt defs that match either GICv5, or legacy GICs. This checks if the GIC is v5 or not, and generates either a GICv2/v3-compatible entry, or one that is GICv5-compatible. This ensures that devices using this interface (RTC, Virtio MMIO) don't need to be aware that a GICv5 irqchip is being used, and are able to directly generate the correct FDT entries. Signed-off-by: Sascha Bischoff --- arm64/fdt.c | 19 ++++++++++++++----- 1 file changed, 14 insertions(+), 5 deletions(-) diff --git a/arm64/fdt.c b/arm64/fdt.c index 44361e6b..07556dff 100644 --- a/arm64/fdt.c +++ b/arm64/fdt.c @@ -65,11 +65,20 @@ static void generate_cpu_nodes(void *fdt, struct kvm *kvm) static void generate_irq_prop(void *fdt, u8 irq, enum irq_type irq_type) { - u32 irq_prop[] = { - cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI), - cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE), - cpu_to_fdt32(irq_type) - }; + u32 irq_prop[3]; + u32 type, offset; + + if (gic__is_v5()) { + type = GICV5_FDT_IRQ_TYPE_SPI; + offset = 0; + } else { + type = GIC_FDT_IRQ_TYPE_SPI; + offset = -GIC_SPI_IRQ_BASE; + } + + irq_prop[0] = cpu_to_fdt32(type); + irq_prop[1] = cpu_to_fdt32(irq + offset); + irq_prop[2] = cpu_to_fdt32(irq_type); _FDT(fdt_property(fdt, "interrupts", irq_prop, sizeof(irq_prop))); } -- 2.34.1