In order to prepare regrouping several Mediatek SoC clock controller dt-bindings files into the MT8186 ones, reorder the MT8186 clock controller compatibles so they are sorted alphanumerically. Signed-off-by: Louis-Alexis Eyraud --- .../bindings/clock/mediatek,mt8186-clock.yaml | 17 +++++++++-------- .../bindings/clock/mediatek,mt8186-sys-clock.yaml | 4 ++-- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8186-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8186-clock.yaml index f4e58bfa504f..37e1d7487ab4 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8186-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8186-clock.yaml @@ -23,18 +23,19 @@ properties: compatible: items: - enum: - - mediatek,mt8186-imp_iic_wrap - - mediatek,mt8186-mfgsys - - mediatek,mt8186-wpesys - - mediatek,mt8186-imgsys1 - - mediatek,mt8186-imgsys2 - - mediatek,mt8186-vdecsys - - mediatek,mt8186-vencsys - mediatek,mt8186-camsys - mediatek,mt8186-camsys_rawa - mediatek,mt8186-camsys_rawb - - mediatek,mt8186-mdpsys + - mediatek,mt8186-imgsys1 + - mediatek,mt8186-imgsys2 + - mediatek,mt8186-imp_iic_wrap - mediatek,mt8186-ipesys + - mediatek,mt8186-mdpsys + - mediatek,mt8186-mfgsys + - mediatek,mt8186-vdecsys + - mediatek,mt8186-vencsys + - mediatek,mt8186-wpesys + reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/clock/mediatek,mt8186-sys-clock.yaml b/Documentation/devicetree/bindings/clock/mediatek,mt8186-sys-clock.yaml index 1c446fbc5108..c857a40ca2f0 100644 --- a/Documentation/devicetree/bindings/clock/mediatek,mt8186-sys-clock.yaml +++ b/Documentation/devicetree/bindings/clock/mediatek,mt8186-sys-clock.yaml @@ -27,10 +27,10 @@ properties: compatible: items: - enum: + - mediatek,mt8186-apmixedsys + - mediatek,mt8186-infracfg_ao - mediatek,mt8186-mcusys - mediatek,mt8186-topckgen - - mediatek,mt8186-infracfg_ao - - mediatek,mt8186-apmixedsys - const: syscon reg: -- 2.54.0