We must set the clk_phy pointer to NULL to indicating it isn't available if the optional phy clock couldn't be obtained. Otherwise the error code returned by of_clk_get() could be wrongly taken as an address, causing invalid pointer dereference when later clk_phy is passed to clk_prepare_enable(). Fixes: da114122b831 ("net: ethernet: stmmac: dwmac-rk: Make the clk_phy could be used for external phy") Signed-off-by: Yao Zi --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) On next-20250903, the fixed commit causes NULL pointer dereference on Radxa E20C during probe of dwmac-rk, a typical dmesg looks like [ 0.273324] rk_gmac-dwmac ffbe0000.ethernet: IRQ eth_lpi not found [ 0.273888] rk_gmac-dwmac ffbe0000.ethernet: IRQ sfty not found [ 0.274520] rk_gmac-dwmac ffbe0000.ethernet: PTP uses main clock [ 0.275226] rk_gmac-dwmac ffbe0000.ethernet: clock input or output? (output). [ 0.275867] rk_gmac-dwmac ffbe0000.ethernet: Can not read property: tx_delay. [ 0.276491] rk_gmac-dwmac ffbe0000.ethernet: set tx_delay to 0x30 [ 0.277026] rk_gmac-dwmac ffbe0000.ethernet: Can not read property: rx_delay. [ 0.278086] rk_gmac-dwmac ffbe0000.ethernet: set rx_delay to 0x10 [ 0.278658] rk_gmac-dwmac ffbe0000.ethernet: integrated PHY? (no). [ 0.279249] Unable to handle kernel paging request at virtual address fffffffffffffffe [ 0.279948] Mem abort info: [ 0.280195] ESR = 0x000000096000006 [ 0.280523] EC = 0x25: DABT (current EL), IL = 32 bits [ 0.280989] SET = 0, FnV = 0 [ 0.281287] EA = 0, S1PTW = 0 [ 0.281574] FSC = 0x06: level 2 translation fault where the invalid address is just -ENOENT (-2). diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index cf619a428664..26ec8ae662a6 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1414,11 +1414,17 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) if (plat->phy_node) { bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0); ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy); - /* If it is not integrated_phy, clk_phy is optional */ + /* + * If it is not integrated_phy, clk_phy is optional. But we must + * set bsp_priv->clk_phy to NULL if clk_phy isn't proivded, or + * the error code could be wrongly taken as an invalid pointer. + */ if (bsp_priv->integrated_phy) { if (ret) return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); clk_set_rate(bsp_priv->clk_phy, 50000000); + } else if (ret) { + bsp_priv->clk_phy = NULL; } } -- 2.50.1