From: Chaoyi Chen For external phy, clk_phy should be optional, and some external phy need the clock input from clk_phy. This patch adds support for setting clk_phy for external phy. Signed-off-by: David Wu Signed-off-by: Chaoyi Chen --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 700858ff6f7c..703b4b24f3bc 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1558,6 +1558,7 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) struct device *dev = &bsp_priv->pdev->dev; int phy_iface = bsp_priv->phy_iface; int i, j, ret; + unsigned int rate; bsp_priv->clk_enabled = false; @@ -1595,12 +1596,19 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) clk_set_rate(bsp_priv->clk_mac, 50000000); } - if (plat->phy_node && bsp_priv->integrated_phy) { + if (plat->phy_node) { bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0); ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy); - if (ret) - return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); - clk_set_rate(bsp_priv->clk_phy, 50000000); + /* If it is not integrated_phy, clk_phy is optional */ + if (bsp_priv->integrated_phy) { + if (ret) + return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); + + ret = of_property_read_u32(plat->phy_node, "clock-frequency", &rate); + if (ret) + rate = 0; + clk_set_rate(bsp_priv->clk_phy, rate ? rate : 50000000); + } } return 0; -- 2.49.0