Move the speed programming for 100M and 10M out of the switch. There is no programming done for 1G speed. It looks like there are two fields, 7:6 which are programemd to '1' to select a /2 divisor for 100M, and bits 16:8 which are programmed to '19' to select a /20 divisor. Signed-off-by: Russell King (Oracle) --- .../ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c index 84db57b3d7cb..10676897619e 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-qcom-ethqos.c @@ -425,6 +425,15 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed) rgmii_updatel(ethqos, RGMII_CONFIG2_TX_CLK_PHASE_SHIFT_EN, phase_shift, RGMII_IO_MACRO_CONFIG2); + if (speed == SPEED_100) + rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_2, + FIELD_PREP(RGMII_CONFIG_MAX_SPD_PRG_2, 1), + RGMII_IO_MACRO_CONFIG); + else if (speed == SPEED_10) + rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_9, + FIELD_PREP(RGMII_CONFIG_MAX_SPD_PRG_9, 19), + RGMII_IO_MACRO_CONFIG); + switch (speed) { case SPEED_1000: rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, @@ -453,9 +462,6 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed) break; case SPEED_100: - rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_2, - FIELD_PREP(RGMII_CONFIG_MAX_SPD_PRG_2, 1), - RGMII_IO_MACRO_CONFIG); rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, RGMII_IO_MACRO_CONFIG2); @@ -479,9 +485,6 @@ static int ethqos_rgmii_macro_init(struct qcom_ethqos *ethqos, int speed) break; case SPEED_10: - rgmii_updatel(ethqos, RGMII_CONFIG_MAX_SPD_PRG_9, - FIELD_PREP(RGMII_CONFIG_MAX_SPD_PRG_9, 19), - RGMII_IO_MACRO_CONFIG); rgmii_clrmask(ethqos, RGMII_CONFIG2_RSVD_CONFIG15, RGMII_IO_MACRO_CONFIG2); if (ethqos->has_emac_ge_3) -- 2.47.3