From: Marc Zyngier Add ACCDATA_EL1 save/restore as part of the EL0 context. This is conditioned on the guest's view of ID_AA64ISAR1_EL1.LS64 reporting that this register is supported. Signed-off-by: Marc Zyngier Fixes: 58ce78667a641 ("arm64: Add support for FEAT_{LS64, LS64_V}") Link: https://lore.kernel.org/r/20240815125959.2097734-5-maz@kernel.org Cc: stable@vger.kernel.org [Fuad: rebased; switch ACCDATA_EL1 for guests only, as the host never uses it; gate it on a new ARM64_HAS_LS64_ACCDATA capability, since in pKVM the host controls a non-protected guest's ID registers, and an EL2 access to ACCDATA_EL1 on a CPU without the feature is UNDEFINED] Signed-off-by: Fuad Tabba --- arch/arm64/kernel/cpufeature.c | 7 +++++++ arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h | 23 ++++++++++++++++++++++ arch/arm64/tools/cpucaps | 1 + 3 files changed, 31 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 32102c3912fa7..b5720c56eebc9 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -3225,6 +3225,13 @@ static const struct arm64_cpu_capabilities arm64_features[] = { .cpu_enable = cpu_enable_ls64_v, ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LS64, LS64_V) }, + { + .desc = "LS64_ACCDATA", + .capability = ARM64_HAS_LS64_ACCDATA, + .type = ARM64_CPUCAP_SYSTEM_FEATURE, + .matches = has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA) + }, #ifdef CONFIG_ARM64_LSUI { .desc = "Unprivileged Load Store Instructions (LSUI)", diff --git a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h index c382848d31947..4a008c8a696ba 100644 --- a/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h +++ b/arch/arm64/kvm/hyp/include/hyp/sysreg-sr.h @@ -17,6 +17,7 @@ #include static inline bool ctxt_has_s1poe(struct kvm_cpu_context *ctxt); +static inline bool ctxt_has_accdata(struct kvm_cpu_context *ctxt); static inline struct kvm_vcpu *ctxt_to_vcpu(struct kvm_cpu_context *ctxt) { @@ -67,6 +68,13 @@ static inline void __sysreg_save_user_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, TPIDR_EL0) = read_sysreg(tpidr_el0); ctxt_sys_reg(ctxt, TPIDRRO_EL0) = read_sysreg(tpidrro_el0); + + /* + * Despite the appearances, ACCDATA_EL1 is part of the EL0 + * context, as it can only be used using ST64BV0. + */ + if (ctxt_has_accdata(ctxt)) + ctxt_sys_reg(ctxt, ACCDATA_EL1) = read_sysreg_s(SYS_ACCDATA_EL1); } static inline bool ctxt_has_mte(struct kvm_cpu_context *ctxt) @@ -131,6 +139,18 @@ static inline bool ctxt_has_sctlr2(struct kvm_cpu_context *ctxt) return kvm_has_sctlr2(kern_hyp_va(vcpu->kvm)); } +static inline bool ctxt_has_accdata(struct kvm_cpu_context *ctxt) +{ + struct kvm_vcpu *vcpu; + + /* The host never uses ACCDATA_EL1 */ + if (!cpus_have_final_cap(ARM64_HAS_LS64_ACCDATA) || !ctxt_is_guest(ctxt)) + return false; + + vcpu = ctxt_to_vcpu(ctxt); + return kvm_has_feat(kern_hyp_va(vcpu->kvm), ID_AA64ISAR1_EL1, LS64, LS64_ACCDATA); +} + static inline void __sysreg_save_el1_state(struct kvm_cpu_context *ctxt) { ctxt_sys_reg(ctxt, SCTLR_EL1) = read_sysreg_el1(SYS_SCTLR); @@ -210,6 +230,9 @@ static inline void __sysreg_restore_user_state(struct kvm_cpu_context *ctxt) { write_sysreg(ctxt_sys_reg(ctxt, TPIDR_EL0), tpidr_el0); write_sysreg(ctxt_sys_reg(ctxt, TPIDRRO_EL0), tpidrro_el0); + + if (ctxt_has_accdata(ctxt)) + write_sysreg_s(ctxt_sys_reg(ctxt, ACCDATA_EL1), SYS_ACCDATA_EL1); } static inline void __sysreg_restore_el1_state(struct kvm_cpu_context *ctxt, diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 2775ba3359cfe..f01719bbd6037 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -49,6 +49,7 @@ HAS_LPA2 HAS_LSE_ATOMICS HAS_LS64 HAS_LS64_V +HAS_LS64_ACCDATA HAS_LSUI HAS_MOPS HAS_NESTED_VIRT -- 2.47.3