From: Hou Tao P2PDMA memory has supported compound page. It is best to enable compound page for p2pdma memory automatically accordingly to the address, the size and the offset of the CMB, however, for nvme device, the p2pdma memory may be used in the kernel space (e.g., for SQ entries) and it will incur a lot of waste when a PUD or PMD-sized page is enabled for nvme device. Therefore, introduce a module parameter cmb_devmap_align to control the alignment of p2pdma memory mapping. Its default value is PAGE_SIZE. When its value is zero, it will use pci_p2pdma_max_pagemap_align() to find the maximal possible mapping alignment. Signed-off-by: Hou Tao --- drivers/nvme/host/pci.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index b070095bae5e..ca0126e36834 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -79,6 +79,10 @@ static bool use_cmb_sqes = true; module_param(use_cmb_sqes, bool, 0444); MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes"); +static unsigned long cmb_devmap_align = PAGE_SIZE; +module_param(cmb_devmap_align, ulong, 0444); +MODULE_PARM_DESC(cmb_devmap_align, "the mapping alignment of CMB"); + static unsigned int max_host_mem_size_mb = 128; module_param(max_host_mem_size_mb, uint, 0444); MODULE_PARM_DESC(max_host_mem_size_mb, @@ -2266,6 +2270,7 @@ static void nvme_map_cmb(struct nvme_dev *dev) u64 size, offset; resource_size_t bar_size; struct pci_dev *pdev = to_pci_dev(dev->dev); + size_t align; int bar; if (dev->cmb_size) @@ -2309,7 +2314,10 @@ static void nvme_map_cmb(struct nvme_dev *dev) dev->bar + NVME_REG_CMBMSC); } - if (pci_p2pdma_add_resource(pdev, bar, size, PAGE_SIZE, offset)) { + align = cmb_devmap_align; + if (!align) + align = pci_p2pdma_max_pagemap_align(pdev, bar, size, offset); + if (pci_p2pdma_add_resource(pdev, bar, size, align, offset)) { dev_warn(dev->ctrl.device, "failed to register the CMB\n"); hi_lo_writeq(0, dev->bar + NVME_REG_CMBMSC); -- 2.29.2