IBS on upcoming microarch introduced two new control MSRs and a couple of new features. Define macros for them. Add these newly added IBS capabilities to KVM-only leaf 0x8000001b, so that when IBS feature bit is enabled on the guest, these newly added features can be used by guests if the hardware and guest os supports it. - X86_FEATURE_IBS_DISABLE: Independent IBS disable capability to avoid RMW race - X86_FEATURE_IBS_FETCHLATFIL: Fetch Latency filtering - X86_FEATURE_IBS_ADDRFILTER: Address Bit 63 based filtering - X86_FEATURE_IBS_STRMST_RMTSOCKET: Streaming store filter and indicator. Remote socket indicator. - X86_FEATURE_IBS_BUFFER1: IBS buffering v1 - X86_FEATURE_IBS_MEMPROFILER: IBS memory profiler Extend VMCB save area to include to the newly added MSRs: MSR_AMD64_IBSFETCHCTL2 and MSR_AMD64_IBSOPCTL2. Signed-off-by: Manali Shukla --- arch/x86/include/asm/svm.h | 4 +++- arch/x86/kvm/cpuid.c | 6 ++++++ arch/x86/kvm/reverse_cpuid.h | 6 ++++++ arch/x86/kvm/svm/svm.c | 7 +++++++ 4 files changed, 22 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/svm.h b/arch/x86/include/asm/svm.h index 17aa6bf76bce..88833db2e739 100644 --- a/arch/x86/include/asm/svm.h +++ b/arch/x86/include/asm/svm.h @@ -382,6 +382,8 @@ struct vmcb_save_area { u64 ibs_dc_linear_addr; u64 ibs_br_target; u64 ibs_fetch_extd_ctl; + u64 ibs_fetch_ctl2; + u64 ibs_op_ctl2; } __packed; /* Save area definition for SEV-ES and SEV-SNP guests */ @@ -564,7 +566,7 @@ struct vmcb { }; } __packed; -#define EXPECTED_VMCB_SAVE_AREA_SIZE 1992 +#define EXPECTED_VMCB_SAVE_AREA_SIZE 2008 #define EXPECTED_GHCB_SAVE_AREA_SIZE 1032 #define EXPECTED_SEV_ES_SAVE_AREA_SIZE 1648 #define EXPECTED_VMCB_CONTROL_AREA_SIZE 1024 diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c index 4e626e77e6a6..e8a664cb0bb8 100644 --- a/arch/x86/kvm/cpuid.c +++ b/arch/x86/kvm/cpuid.c @@ -1239,6 +1239,12 @@ void kvm_initialize_cpu_caps(void) F(IBS_FETCHCTLEXTD), F(IBS_ZEN4_EXT), F(IBS_LOADLATFIL), + F(IBS_DISABLE), + F(IBS_FETCHLATFIL), + F(IBS_ADDRFILTER), + F(IBS_STRMST_RMTSOCKET), + F(IBS_BUFFER1), + F(IBS_MEMPROFILER), F(IBS_ZEN4_DTLBSTAT), ); diff --git a/arch/x86/kvm/reverse_cpuid.h b/arch/x86/kvm/reverse_cpuid.h index 22cfdb331e9e..1af2ba207b8a 100644 --- a/arch/x86/kvm/reverse_cpuid.h +++ b/arch/x86/kvm/reverse_cpuid.h @@ -89,6 +89,12 @@ #define X86_FEATURE_IBS_FETCHCTLEXTD KVM_X86_FEATURE(CPUID_8000_001B_EAX, 9) #define X86_FEATURE_IBS_ZEN4_EXT KVM_X86_FEATURE(CPUID_8000_001B_EAX, 11) #define X86_FEATURE_IBS_LOADLATFIL KVM_X86_FEATURE(CPUID_8000_001B_EAX, 12) +#define X86_FEATURE_IBS_DISABLE KVM_X86_FEATURE(CPUID_8000_001B_EAX, 13) +#define X86_FEATURE_IBS_FETCHLATFIL KVM_X86_FEATURE(CPUID_8000_001B_EAX, 14) +#define X86_FEATURE_IBS_ADDRFILTER KVM_X86_FEATURE(CPUID_8000_001B_EAX, 15) +#define X86_FEATURE_IBS_STRMST_RMTSOCKET KVM_X86_FEATURE(CPUID_8000_001B_EAX, 16) +#define X86_FEATURE_IBS_BUFFER1 KVM_X86_FEATURE(CPUID_8000_001B_EAX, 17) +#define X86_FEATURE_IBS_MEMPROFILER KVM_X86_FEATURE(CPUID_8000_001B_EAX, 18) #define X86_FEATURE_IBS_ZEN4_DTLBSTAT KVM_X86_FEATURE(CPUID_8000_001B_EAX, 19) struct cpuid_reg { diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index 421a929398da..9bf0d5f66239 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -800,6 +800,13 @@ static void svm_recalc_ibs_msr_intercepts(struct kvm_vcpu *vcpu) svm_set_intercept_for_msr(vcpu, MSR_AMD64_IBSDCLINAD, MSR_TYPE_RW, intercept); svm_set_intercept_for_msr(vcpu, MSR_AMD64_IBSBRTARGET, MSR_TYPE_RW, intercept); svm_set_intercept_for_msr(vcpu, MSR_AMD64_ICIBSEXTDCTL, MSR_TYPE_RW, intercept); + + if (guest_cpu_cap_has(vcpu, X86_FEATURE_IBS_DISABLE)) { + svm_set_intercept_for_msr(vcpu, MSR_AMD64_IBSFETCHCTL2, MSR_TYPE_RW, + intercept); + svm_set_intercept_for_msr(vcpu, MSR_AMD64_IBSOPCTL2, MSR_TYPE_RW, + intercept); + } } static void svm_recalc_msr_intercepts(struct kvm_vcpu *vcpu) -- 2.43.0