From: Arun Iyengar <aiyengar1990@gmail.com>

Describe ACLK_MMU_PHP, so the SMMU keeps its clock while its masters
are idle, and SRST_A_MMU_PHP, as for the PCIe SMMU.

Signed-off-by: Arun Iyengar <aiyengar1990@gmail.com>
---
 arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
index 8807ce6193bf..3bf8d0e4ff33 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
@@ -570,6 +570,8 @@ mmu600_php: iommu@fcb00000 {
 			     <GIC_SPI 386 IRQ_TYPE_EDGE_RISING 0>,
 			     <GIC_SPI 379 IRQ_TYPE_EDGE_RISING 0>;
 		interrupt-names = "eventq", "gerror", "priq", "cmdq-sync";
+		clocks = <&cru ACLK_MMU_PHP>;
+		resets = <&cru SRST_A_MMU_PHP>;
 		#iommu-cells = <1>;
 		status = "disabled";
 	};

-- 
2.55.0