From: Chaoyi Chen This reverts commit da114122b83149d1f1db0586b1d67947b651aa20. As discussed, the PHY clock should be managed by PHY driver instead of other driver like dwmac-rk. Signed-off-by: Chaoyi Chen --- drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 266c53379236..49f92cd79aa8 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -1410,15 +1410,12 @@ static int rk_gmac_clk_init(struct plat_stmmacenet_data *plat) clk_set_rate(plat->stmmac_clk, 50000000); } - if (plat->phy_node) { + if (plat->phy_node && bsp_priv->integrated_phy) { bsp_priv->clk_phy = of_clk_get(plat->phy_node, 0); ret = PTR_ERR_OR_ZERO(bsp_priv->clk_phy); - /* If it is not integrated_phy, clk_phy is optional */ - if (bsp_priv->integrated_phy) { - if (ret) - return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); - clk_set_rate(bsp_priv->clk_phy, 50000000); - } + if (ret) + return dev_err_probe(dev, ret, "Cannot get PHY clock\n"); + clk_set_rate(bsp_priv->clk_phy, 50000000); } return 0; -- 2.49.0