Since commit 58ce78667a641 ("arm64: Add support for FEAT_{LS64, LS64_V}"), a guest sees the host's ID_AA64ISAR1_EL1.LS64, but KVM only enables the FEAT_LS64 and FEAT_LS64_V instructions in HCRX_EL2. On a host with FEAT_LS64_ACCDATA, a guest's ST64BV0 therefore traps and hits the WARN_ON_ONCE() in handle_other(). ACCDATA_EL1 isn't trapped or context-switched either, so every guest on that CPU shares it. Rather than support FEAT_LS64_ACCDATA, which requires ACCDATA_EL1 to be context-switched, cap the field at LS64_V. The guest's ACCDATA_EL1 accesses then UNDEF. This hides FEAT_LS64WB too, as it implies FEAT_LS64_ACCDATA. A VM saved on an older kernel can carry any level up to the host's, so keep accepting those from the VMM, capped the same way. One saved at LS64_ACCDATA or above restores at LS64_V. Fixes: 58ce78667a641 ("arm64: Add support for FEAT_{LS64, LS64_V}") Cc: stable@vger.kernel.org Signed-off-by: Fuad Tabba --- arch/arm64/kvm/sys_regs.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 44aae52c473d7..7801166991b12 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1958,6 +1958,9 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu, ID_AA64ISAR1_EL1_API | ID_AA64ISAR1_EL1_GPA | ID_AA64ISAR1_EL1_GPI); + + /* ACCDATA_EL1 isn't context-switched, so no FEAT_LS64_ACCDATA */ + val = ID_REG_LIMIT_FIELD_ENUM(val, ID_AA64ISAR1_EL1, LS64, LS64_V); break; case SYS_ID_AA64ISAR2_EL1: if (!vcpu_has_ptrauth(vcpu)) @@ -2403,6 +2406,22 @@ static int set_id_aa64pfr2_el1(struct kvm_vcpu *vcpu, return set_id_reg(vcpu, rd, user_val); } +static int set_id_aa64isar1_el1(struct kvm_vcpu *vcpu, + const struct sys_reg_desc *rd, u64 user_val) +{ + u64 hw_val = read_sanitised_ftr_reg(SYS_ID_AA64ISAR1_EL1); + u64 ls64_mask = ID_AA64ISAR1_EL1_LS64_MASK; + + /* + * Older kernels let userspace set LS64 up to the host's level, so + * keep accepting those values, capped at LS64_V. + */ + if ((user_val & ls64_mask) <= (hw_val & ls64_mask)) + user_val = ID_REG_LIMIT_FIELD_ENUM(user_val, ID_AA64ISAR1_EL1, LS64, LS64_V); + + return set_id_reg(vcpu, rd, user_val); +} + /* * Allow userspace to de-feature a stage-2 translation granule but prevent it * from claiming the impossible. @@ -3428,10 +3447,11 @@ static const struct sys_reg_desc sys_reg_descs[] = { /* CRm=6 */ ID_WRITABLE(ID_AA64ISAR0_EL1, ~ID_AA64ISAR0_EL1_RES0), - ID_WRITABLE(ID_AA64ISAR1_EL1, ~(ID_AA64ISAR1_EL1_GPI | - ID_AA64ISAR1_EL1_GPA | - ID_AA64ISAR1_EL1_API | - ID_AA64ISAR1_EL1_APA)), + ID_FILTERED(ID_AA64ISAR1_EL1, id_aa64isar1_el1, + ~(ID_AA64ISAR1_EL1_GPI | + ID_AA64ISAR1_EL1_GPA | + ID_AA64ISAR1_EL1_API | + ID_AA64ISAR1_EL1_APA)), ID_WRITABLE(ID_AA64ISAR2_EL1, ~(ID_AA64ISAR2_EL1_RES0 | ID_AA64ISAR2_EL1_APA3 | ID_AA64ISAR2_EL1_GPA3)), -- 2.47.3