From: Vincent Jardin The Microchip ZL30643 is a 3-channel ZL3064x line-card part that is register compatible with the ZL30733. Only the runtime chip-ID table needs the 0x0E3B entry so the probe resolves the channel count (3) and flags. The ZL3073X_FLAG_REF_PHASE_COMP_32 flag applies unchanged: the ref_phase path dpll_meas_ctrl::en -> ref_phase_0P/0N -> ref_phase_offset_compensation -> ref_phase_err_read_rqst is identical between ZL3064x and ZL3073x. No new device flag is needed. Test: once register, for instance, we get: devlink dev param set spi/spi0.0 name clock_id value 3733 cmode driverinit devlink dev reload spi/spi0.0 devlink dev param set spi/spi2.1 name clock_id value 3643 cmode driverinit devlink dev reload spi/spi2.1 dpll device show | grep clock-id clock-id: 3733 clock-id: 3733 clock-id: 3733 clock-id: 3643 clock-id: 3643 clock-id: 3643 Signed-off-by: Vincent Jardin --- drivers/dpll/zl3073x/core.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/dpll/zl3073x/core.c b/drivers/dpll/zl3073x/core.c index 8e6416a4741d..4d07f69efb44 100644 --- a/drivers/dpll/zl3073x/core.c +++ b/drivers/dpll/zl3073x/core.c @@ -25,6 +25,7 @@ static const struct zl3073x_chip_info zl3073x_chip_ids[] = { ZL_CHIP_INFO(0x0E30, 2, ZL3073X_FLAG_REF_PHASE_COMP_32), + ZL_CHIP_INFO(0x0E3B, 3, ZL3073X_FLAG_REF_PHASE_COMP_32), ZL_CHIP_INFO(0x0E93, 1, ZL3073X_FLAG_REF_PHASE_COMP_32), ZL_CHIP_INFO(0x0E94, 2, ZL3073X_FLAG_REF_PHASE_COMP_32), ZL_CHIP_INFO(0x0E95, 3, ZL3073X_FLAG_REF_PHASE_COMP_32), -- 2.43.0