From: Yuchao Zhang By code inspection, a race condition and potential Use-After-Free/crash exists between remote LPI disabling and local LR folding when EOImode==0. Commit 6da5e537f5af ("KVM: arm64: vgic: Pick EOIcount deactivations from AP-list tail") introduced tracking the last interrupt placed in a List Register in per-CPU host data (*host_data_ptr(last_lr_irq)) and traverses the remaining ap_list via list_for_each_entry_continue() in vgic_v3_fold_lr_state(). However, an interrupt loaded into an LR can be an LPI. While vCPU-B is running the guest, another vCPU-A can write to vCPU-B's redistributor GICR_CTLR to clear EnableLPIs, which dispatches vgic_flush_pending_lpis(). vgic_flush_pending_lpis() unconditionally removes all LPIs from ap_list without checking whether the interrupt is currently in an LR (irq->on_lr): - It calls list_del(&irq->ap_list), setting ap_list.next to LIST_POISON1, and drops the AP-list reference. - If the LPI is unmapped or its translation cache was invalidated, the vgic_irq refcount drops to zero and the object is freed via RCU. - Meanwhile, vCPU-B's per-CPU *host_data_ptr(last_lr_irq) cannot be cleared by remote vCPUs and is left dangling. When vCPU-B subsequently exits the guest: 1. vgic_v3_fold_lr_state() resumes using the unlinked last_lr_irq. 2. list_for_each_entry_continue() unconditionally evaluates list_next_entry(irq, ap_list) during loop initialization, accessing LIST_POISON1 (or freed memory). 3. If eoicount > 0, it attempts guard(raw_spinlock)(&irq->irq_lock) on the poisoned address, leading to an immediate host kernel panic. Fix this by: 1. In vgic_flush_pending_lpis(), do not remove LPIs that are currently in-flight in an LR (irq->on_lr == true). They will be naturally pruned by the owning vCPU's vgic_prune_ap_list() after LR folding. 2. In vgic_fold_state(), clear *host_data_ptr(last_lr_irq) after folding so that no stale pointer survives past guest execution. 3. In vgic_v3_fold_lr_state() and vgic_v2_fold_lr_state(), bail out immediately if eoicount is zero, avoiding unnecessary list_next_entry() evaluation. 4. In vgic_v3_fold_lr(), do not resurrect the pending state of an edge LPI folded while the redistributor has LPIs disabled. vgic_flush_pending_lpis() cannot remotely clear the LRs of a running vCPU, so such an LPI would otherwise be requeued and re-injected while GICR_CTLR.EnableLPIs is 0, violating the flush semantics (and the architecture, which gives no expectation of the pending state being retained across a disable). Note: this closes the primary race (the last_lr_irq node itself is no longer unlinkable while in-flight), but the fold traversal can still race with a remote flush unlinking a subsequent non-LR node in the ap_list tail. Fully closing that window needs the fold side to take references before dropping locks (in the spirit of the prune-side fix in commit 7258770e5814 ("KVM: arm64: vgic: Handle race between interrupt affinity change and LPI disabling")) and is left as a follow-up. Fixes: 6da5e537f5af ("KVM: arm64: vgic: Pick EOIcount deactivations from AP-list tail") Cc: stable@vger.kernel.org Signed-off-by: Yuchao Zhang --- arch/arm64/kvm/vgic/vgic-v2.c | 3 +++ arch/arm64/kvm/vgic/vgic-v3.c | 14 ++++++++++++-- arch/arm64/kvm/vgic/vgic.c | 10 +++++++--- 3 files changed, 22 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kvm/vgic/vgic-v2.c b/arch/arm64/kvm/vgic/vgic-v2.c index 7182f63fc938..7b6cd05ce32d 100644 --- a/arch/arm64/kvm/vgic/vgic-v2.c +++ b/arch/arm64/kvm/vgic/vgic-v2.c @@ -122,6 +122,9 @@ void vgic_v2_fold_lr_state(struct kvm_vcpu *vcpu) for (int lr = 0; lr < vgic_cpu->vgic_v2.used_lrs; lr++) vgic_v2_fold_lr(vcpu, cpuif->vgic_lr[lr]); + if (!eoicount) + return; + /* See the GICv3 equivalent for the EOIcount handling rationale */ list_for_each_entry_continue(irq, &vgic_cpu->ap_list_head, ap_list) { u32 lr; diff --git a/arch/arm64/kvm/vgic/vgic-v3.c b/arch/arm64/kvm/vgic/vgic-v3.c index 726e20a1da6e..dd1314f4543d 100644 --- a/arch/arm64/kvm/vgic/vgic-v3.c +++ b/arch/arm64/kvm/vgic/vgic-v3.c @@ -96,9 +96,16 @@ static void vgic_v3_fold_lr(struct kvm_vcpu *vcpu, u64 val) deactivated = irq->active && !(val & ICH_LR_ACTIVE_BIT); irq->active = !!(val & ICH_LR_ACTIVE_BIT); - /* Edge is the only case where we preserve the pending bit */ + /* + * Edge is the only case where we preserve the pending bit. + * Do not resurrect the pending state of LPIs once the + * redistributor has them disabled: vgic_flush_pending_lpis() + * has discarded them, and the LRs of a running vCPU cannot + * be remotely cleared. + */ if (irq->config == VGIC_CONFIG_EDGE && - (val & ICH_LR_PENDING_BIT)) + (val & ICH_LR_PENDING_BIT) && + (irq->intid < VGIC_MIN_LPI || vgic_lpis_enabled(vcpu))) irq->pending_latch = true; /* @@ -155,6 +162,9 @@ void vgic_v3_fold_lr_state(struct kvm_vcpu *vcpu) for (int lr = 0; lr < cpuif->used_lrs; lr++) vgic_v3_fold_lr(vcpu, cpuif->vgic_lr[lr]); + if (!eoicount) + return; + /* * EOIMode=0: use EOIcount to emulate deactivation. We are * guaranteed to deactivate in reverse order of the activation, so diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c index b25303d9919f..0d7d75c3ac93 100644 --- a/arch/arm64/kvm/vgic/vgic.c +++ b/arch/arm64/kvm/vgic/vgic.c @@ -205,10 +205,12 @@ void vgic_flush_pending_lpis(struct kvm_vcpu *vcpu) if (irq_is_lpi(vcpu->kvm, irq->intid)) { raw_spin_lock(&irq->irq_lock); irq->pending_latch = false; - list_del(&irq->ap_list); - irq->vcpu = NULL; + if (!irq->on_lr) { + list_del(&irq->ap_list); + irq->vcpu = NULL; + deleted |= vgic_put_irq_norelease(vcpu->kvm, irq); + } raw_spin_unlock(&irq->irq_lock); - deleted |= vgic_put_irq_norelease(vcpu->kvm, irq); } } @@ -873,6 +875,8 @@ static void vgic_fold_state(struct kvm_vcpu *vcpu) vgic_v2_fold_lr_state(vcpu); else vgic_v3_fold_lr_state(vcpu); + + *host_data_ptr(last_lr_irq) = NULL; } /* Requires the irq_lock to be held. */ -- 2.53.0