From: Javen Xu To support RSS, the number of hardware interrupt bits should match the interrupt of software. So we add support for new interrupt mapping here. ISR_VER_MAP_REG is the hardware register to indicate interrupt status. IMR_SET_VEC_MAP_REG is interrupt mask which is set to enable irq. Signed-off-by: Javen Xu --- Changes in v2: - no changes Changes in v3: - init index in napi_struct and get message_id from index - move rtl8169_disable_hw_interrupt_msix directly before the call to napi_schedule() - change the condition in rtl8169_request_irq when RTL_VEC_MAP_ENABLE enabled, use rtl8169_interrupt_msix Changes in v4: - remove flag tp->feature, replace tp->features & RTL_VEC_MAP_ENABLE with tp->irq_nvecs > 1, they are equivalent. - follow reverse xmas tree, in rtl8169_interrupt_msix(), rtl8169_poll_msix_rx(), rtl8169_poll_msix_tx(), rtl8169_poll_msix_other() - use napi->index in rtl8169_poll_msix_other() - add a comment to describe RTL8127 MSI-X vector layout - simplify r8169_init_napi() Changes in v5: - replace magic number in rtl8169_poll_msix_tx() --- drivers/net/ethernet/realtek/r8169_main.c | 163 ++++++++++++++++++++-- 1 file changed, 149 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index f911d9e3b45a..cbc6285961c2 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -79,6 +79,7 @@ #define R8169_TX_START_THRS (2 * R8169_TX_STOP_THRS) #define R8169_MAX_RX_QUEUES 8 #define R8127_MAX_RX_QUEUES 8 +#define R8127_MAX_TX_QUEUES 8 #define R8169_DEFAULT_RX_QUEUES 1 #define R8169_MAX_TX_QUEUES 1 @@ -449,8 +450,12 @@ enum rtl8125_registers { RSS_CTRL_8125 = 0x4500, Q_NUM_CTRL_8125 = 0x4800, EEE_TXIDLE_TIMER_8125 = 0x6048, + IMR_CLEAR_VEC_MAP_REG = 0x0d00, + ISR_VEC_MAP_REG = 0x0d04, + IMR_SET_VEC_MAP_REG = 0x0d0c, }; +#define MSIX_ID_VEC_MAP_LINKCHG 29 #define LEDSEL_MASK_8125 0x23f #define RX_VLAN_INNER_8125 BIT(22) @@ -581,6 +586,9 @@ enum rtl_register_content { /* magic enable v2 */ MagicPacket_v2 = (1 << 16), /* Wake up when receives a Magic Packet */ +#define ISRIMR_LINKCHG BIT(29) +#define ISRIMR_TOK_Q0 BIT(8) +#define ISRIMR_ROK_Q0 BIT(0) }; enum rtl_desc_bit { @@ -1665,26 +1673,36 @@ static u32 rtl_get_events(struct rtl8169_private *tp) static void rtl_ack_events(struct rtl8169_private *tp, u32 bits) { - if (rtl_is_8125(tp)) + if (rtl_is_8125(tp)) { RTL_W32(tp, IntrStatus_8125, bits); - else + if (tp->irq_nvecs > 1) + RTL_W32(tp, ISR_VEC_MAP_REG, 0xffffffff); + } else { RTL_W16(tp, IntrStatus, bits); + } } static void rtl_irq_disable(struct rtl8169_private *tp) { - if (rtl_is_8125(tp)) + if (rtl_is_8125(tp)) { RTL_W32(tp, IntrMask_8125, 0); - else + if (tp->irq_nvecs > 1) + RTL_W32(tp, IMR_CLEAR_VEC_MAP_REG, 0xffffffff); + } else { RTL_W16(tp, IntrMask, 0); + } } static void rtl_irq_enable(struct rtl8169_private *tp) { - if (rtl_is_8125(tp)) - RTL_W32(tp, IntrMask_8125, tp->irq_mask); - else + if (rtl_is_8125(tp)) { + if (tp->irq_nvecs > 1) + RTL_W32(tp, IMR_SET_VEC_MAP_REG, tp->irq_mask); + else + RTL_W32(tp, IntrMask_8125, tp->irq_mask); + } else { RTL_W16(tp, IntrMask, tp->irq_mask); + } } static void rtl8169_irq_mask_and_ack(struct rtl8169_private *tp) @@ -5061,6 +5079,44 @@ static void rtl8169_free_irq(struct rtl8169_private *tp) } } +static void rtl8169_disable_hw_interrupt_msix(struct rtl8169_private *tp, int message_id) +{ + RTL_W32(tp, IMR_CLEAR_VEC_MAP_REG, BIT(message_id)); +} + +static void rtl8169_clear_hw_isr(struct rtl8169_private *tp, int message_id) +{ + RTL_W32(tp, ISR_VEC_MAP_REG, BIT(message_id)); +} + +static void rtl8169_enable_hw_interrupt_msix(struct rtl8169_private *tp, int message_id) +{ + RTL_W32(tp, IMR_SET_VEC_MAP_REG, BIT(message_id)); +} + +static irqreturn_t rtl8169_interrupt_msix(int irq, void *dev_instance) +{ + struct napi_struct *napi = dev_instance; + struct net_device *dev = napi->dev; + int message_id = napi->index; + struct rtl8169_private *tp; + + tp = netdev_priv(dev); + + rtl8169_clear_hw_isr(tp, message_id); + + if (message_id == MSIX_ID_VEC_MAP_LINKCHG) { + phy_mac_interrupt(tp->phydev); + return IRQ_HANDLED; + } + + tp->recheck_desc_ownbit = true; + rtl8169_disable_hw_interrupt_msix(tp, message_id); + napi_schedule(napi); + + return IRQ_HANDLED; +} + static int rtl8169_request_irq(struct rtl8169_private *tp) { struct net_device *dev = tp->dev; @@ -5069,8 +5125,12 @@ static int rtl8169_request_irq(struct rtl8169_private *tp) for (i = 0; i < tp->irq_nvecs; i++) { napi = &tp->rtl8169_napi[i]; - rc = pci_request_irq(tp->pci_dev, i, rtl8169_interrupt, - NULL, napi, "%s-%d", dev->name, i); + if (tp->irq_nvecs > 1) + rc = pci_request_irq(tp->pci_dev, i, rtl8169_interrupt_msix, + NULL, napi, "%s-%d", dev->name, i); + else + rc = pci_request_irq(tp->pci_dev, i, rtl8169_interrupt, + NULL, napi, "%s-%d", dev->name, i); if (rc) goto err_unwind; } @@ -5516,10 +5576,16 @@ static const struct net_device_ops rtl_netdev_ops = { static void rtl_set_irq_mask(struct rtl8169_private *tp) { - tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; + if (tp->irq_nvecs > 1) { + tp->irq_mask = ISRIMR_LINKCHG | ISRIMR_TOK_Q0; + for (int i = 0; i < tp->num_rx_rings; i++) + tp->irq_mask |= ISRIMR_ROK_Q0 << i; + } else { + tp->irq_mask = RxOK | RxErr | TxOK | TxErr | LinkChg; - if (tp->mac_version <= RTL_GIGA_MAC_VER_06) - tp->irq_mask |= SYSErr | RxFIFOOver; + if (tp->mac_version <= RTL_GIGA_MAC_VER_06) + tp->irq_mask |= SYSErr | RxFIFOOver; + } } static int rtl_alloc_irq(struct rtl8169_private *tp) @@ -5815,10 +5881,79 @@ static bool rtl_aspm_is_safe(struct rtl8169_private *tp) return false; } +static int rtl8169_poll_msix_rx(struct napi_struct *napi, int budget) +{ + struct net_device *dev = napi->dev; + const int message_id = napi->index; + struct rtl8169_private *tp; + int work_done = 0; + + tp = netdev_priv(dev); + + if (message_id < tp->num_rx_rings) + work_done += rtl_rx(dev, tp, &tp->rx_ring[message_id], budget); + + if (work_done < budget && napi_complete_done(napi, work_done)) + rtl8169_enable_hw_interrupt_msix(tp, message_id); + + return work_done; +} + +static int rtl8169_poll_msix_tx(struct napi_struct *napi, int budget) +{ + struct net_device *dev = napi->dev; + const int message_id = napi->index; + unsigned int work_done = 0; + struct rtl8169_private *tp; + int tx_ring_idx; + + tp = netdev_priv(dev); + tx_ring_idx = message_id - R8127_MAX_RX_QUEUES; + + if (tx_ring_idx >= 0) + rtl_tx(dev, tp, budget); + + if (work_done < budget && napi_complete_done(napi, work_done)) + rtl8169_enable_hw_interrupt_msix(tp, message_id); + + return work_done; +} + +static int rtl8169_poll_msix_other(struct napi_struct *napi, int budget) +{ + struct net_device *dev = napi->dev; + const int message_id = napi->index; + struct rtl8169_private *tp; + + tp = netdev_priv(dev); + + napi_complete_done(napi, budget); + rtl8169_enable_hw_interrupt_msix(tp, message_id); + + return 1; +} + +/* RTL8127 MSI-X vector layout: + * Vectors 0 .. (RxQs - 1) : Rx Queues + * Vectors RxQs .. (RxQs + TxQs - 1) : Tx Queues + * Vector (RxQs + TxQs) and up : Other events (Link status(29), etc.) + */ static void r8169_init_napi(struct rtl8169_private *tp) { - for (int i = 0; i < tp->irq_nvecs; i++) - netif_napi_add(tp->dev, &tp->rtl8169_napi[i], rtl8169_poll); + for (int i = 0; i < tp->irq_nvecs; i++) { + int (*poll_fn)(struct napi_struct *, int) = rtl8169_poll; + + if (tp->irq_nvecs > 1) { + if (i < R8127_MAX_RX_QUEUES) + poll_fn = rtl8169_poll_msix_rx; + else if (i < R8127_MAX_RX_QUEUES + R8127_MAX_TX_QUEUES) + poll_fn = rtl8169_poll_msix_tx; + else + poll_fn = rtl8169_poll_msix_other; + } + netif_napi_add(tp->dev, &tp->rtl8169_napi[i], poll_fn); + tp->rtl8169_napi[i].index = i; + } } static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) -- 2.43.0