Booting windows server 2025 on top of Linux KVM results in host kernel warning logs of "Unhandled WRMSR(0xc0010115) = 0x0", which is due to "IGNNE MSR" write in guest hyper-v. According to AMD APM volume 2, section 15.30.2, the MSR is "only useful if IGNNE emulation has been enabled in the HW_CR MSR", while currently KVM has prevented guests from enabling it. So change the warning to a stronger check. IGNNE is used in the legacy MS-DOS compatibility sub-mode of X87 FPU exception handling. Intel SDM volume 1, section 8,7.2 describes the details of this mode which applies to AMD CPU as well. The CPU selects this mode when CR0.NE bit is 0, and will rely on two pins (FERR# and IGNNE#) for exception handling. AMD later introduced IGNNE MSR to "set the state of the processor-internal IGNNE signal directly" in order to support the legacy mode without the dependency on IGNNE# pin. The current KVM implementation does not emulate this feature, not sound necessary as well. The commit 82494028dff648c29e3a ("KVM: SVM: Ignore write of hwcr.ignne") clears the bit-8 value in the guest HWCR MSR write, making such field always zero, then the write to guest IGNNE MSR can always be safely ignored. Signed-off-by: Jerry Lyu --- arch/x86/kvm/svm/svm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/x86/kvm/svm/svm.c b/arch/x86/kvm/svm/svm.c index ef69a51ab27f..1100d9a66c2c 100644 --- a/arch/x86/kvm/svm/svm.c +++ b/arch/x86/kvm/svm/svm.c @@ -3196,7 +3196,7 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) case MSR_VM_CR: return svm_set_vm_cr(vcpu, data); case MSR_VM_IGNNE: - kvm_pr_unimpl_wrmsr(vcpu, ecx, data); + KVM_BUG_ON(vcpu->arch.msr_hwcr & BIT_ULL(8), vcpu->kvm); break; case MSR_AMD64_DE_CFG: { u64 supported_de_cfg; base-commit: 50406d35f5635e1cc523e61409d57e851b5f5df8 -- 2.43.7