Before converting to the phylink interface, the init function would have set the correct I/F mode depending on the maximum link speed of an interface. After converting to phylink, the established link speed is used to determine this setting and is set in the .link_up() callback. The callback isn't called because the link is never established between the PCS and a connected SGMII PHY. To fix it, don't use the current speed, but set the mode depending on the interface (which implies the maximum speed) in .mac_config(). Fixes: 5d93cfcf7360 ("net: dpaa: Convert to phylink") Suggested-by: Sean Anderson Signed-off-by: Michael Walle --- FWIW, I dropped setting a non-reserved mode in init(). The hardware default is 0 and the mac_config() will set a valid mode anyway. Changes in v2: - the setting is/was based on the maximum speed, not the current speed. thus, move the setting into mac_config(). - Link to v1: https://lore.kernel.org/r/20260706121011.1948906-1-mwalle@kernel.org/ .../net/ethernet/freescale/fman/fman_dtsec.c | 26 ++++++++++--------- 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/net/ethernet/freescale/fman/fman_dtsec.c b/drivers/net/ethernet/freescale/fman/fman_dtsec.c index fe35703c509e..7075f93bab49 100644 --- a/drivers/net/ethernet/freescale/fman/fman_dtsec.c +++ b/drivers/net/ethernet/freescale/fman/fman_dtsec.c @@ -900,22 +900,28 @@ static void dtsec_mac_config(struct phylink_config *config, unsigned int mode, { struct mac_device *mac_dev = fman_config_to_mac(config); struct dtsec_regs __iomem *regs = mac_dev->fman_mac->regs; - u32 tmp; + u32 ecntrl, maccfg2; + + maccfg2 = ioread32be(®s->maccfg2); + maccfg2 &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE); switch (state->interface) { case PHY_INTERFACE_MODE_RMII: - tmp = DTSEC_ECNTRL_RMM; + ecntrl = DTSEC_ECNTRL_RMM; + maccfg2 |= MACCFG2_NIBBLE_MODE; break; case PHY_INTERFACE_MODE_RGMII: case PHY_INTERFACE_MODE_RGMII_ID: case PHY_INTERFACE_MODE_RGMII_RXID: case PHY_INTERFACE_MODE_RGMII_TXID: - tmp = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM; + ecntrl = DTSEC_ECNTRL_GMIIM | DTSEC_ECNTRL_RPM; + maccfg2 |= MACCFG2_BYTE_MODE; break; case PHY_INTERFACE_MODE_SGMII: case PHY_INTERFACE_MODE_1000BASEX: case PHY_INTERFACE_MODE_2500BASEX: - tmp = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM; + ecntrl = DTSEC_ECNTRL_TBIM | DTSEC_ECNTRL_SGMIIM; + maccfg2 |= MACCFG2_BYTE_MODE; break; default: dev_warn(mac_dev->dev, "cannot configure dTSEC for %s\n", @@ -923,7 +929,8 @@ static void dtsec_mac_config(struct phylink_config *config, unsigned int mode, return; } - iowrite32be(tmp, ®s->ecntrl); + iowrite32be(ecntrl, ®s->ecntrl); + iowrite32be(maccfg2, ®s->maccfg2); } static void dtsec_link_up(struct phylink_config *config, struct phy_device *phy, @@ -948,15 +955,10 @@ static void dtsec_link_up(struct phylink_config *config, struct phy_device *phy, iowrite32be(tmp, ®s->ecntrl); tmp = ioread32be(®s->maccfg2); - tmp &= ~(MACCFG2_NIBBLE_MODE | MACCFG2_BYTE_MODE | MACCFG2_FULL_DUPLEX); - if (speed >= SPEED_1000) - tmp |= MACCFG2_BYTE_MODE; - else - tmp |= MACCFG2_NIBBLE_MODE; - if (duplex == DUPLEX_FULL) tmp |= MACCFG2_FULL_DUPLEX; - + else + tmp &= ~MACCFG2_FULL_DUPLEX; iowrite32be(tmp, ®s->maccfg2); mac_dev->update_speed(mac_dev, speed); -- 2.47.3