Kernel commit 9c11fcb2e9a54 ("dpll: add fractional frequency offset to pin-parent-device") added fractional-frequency-offset (PPM) and fractional-frequency-offset-ppt (PPT) attributes to the pin-parent-device nested attribute set, alongside the existing top-level pin attributes. Add their display into dpll_pin_print_parent_devices() and add ppm and ppt units to the respective outputs. Extract dpll_pr_ffo() helper to consolidate the duplicated PPM/PPT fallback logic used in both top-level and parent-device contexts. Signed-off-by: Ivan Vecera --- dpll/dpll.c | 27 ++++++++++++++++++++++----- man/man8/dpll.8 | 4 +++- 2 files changed, 25 insertions(+), 6 deletions(-) diff --git a/dpll/dpll.c b/dpll/dpll.c index bd9ab3c6033f..1077fc259725 100644 --- a/dpll/dpll.c +++ b/dpll/dpll.c @@ -514,6 +514,26 @@ static void dpll_pr_phase_offset(struct nlattr *attr) print_s64(PRINT_FP, NULL, "%03lld ps", d.rem); } +static void dpll_pr_ffo(struct nlattr **tb, bool top_level) +{ + const char *fmt; + + if (json || !tb[DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT]) { + if (top_level) + fmt = " fractional-frequency-offset: %" PRId64 " ppm\n"; + else + fmt = " fractional-frequency-offset %" PRId64 " ppm"; + DPLL_PR_SINT_FMT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, + "fractional-frequency-offset", fmt); + } + if (top_level) + fmt = " fractional-frequency-offset: %" PRId64 " ppt\n"; + else + fmt = " fractional-frequency-offset %" PRId64 " ppt"; + DPLL_PR_SINT_FMT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT, + "fractional-frequency-offset-ppt", fmt); +} + /* Measured frequency - JSON prints raw mHz value, FP prints fractional Hz */ static void dpll_pr_measured_frequency(struct nlattr *attr) { @@ -1602,6 +1622,7 @@ static void dpll_pin_print_parent_devices(struct nlattr *attr) "operstate", " operstate %s", dpll_pin_operstate_name); dpll_pr_phase_offset(tb_parent[DPLL_A_PIN_PHASE_OFFSET]); + dpll_pr_ffo(tb_parent, false); print_nl(); close_json_object(); @@ -1694,11 +1715,7 @@ static void dpll_pin_print_attrs(struct nlattr **tb) DPLL_PR_INT_FMT(tb, DPLL_A_PIN_PHASE_ADJUST, "phase-adjust", " phase-adjust: %d ps\n"); - if (json || !tb[DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT]) - DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, - "fractional-frequency-offset"); - DPLL_PR_SINT(tb, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT, - "fractional-frequency-offset-ppt"); + dpll_pr_ffo(tb, true); DPLL_PR_U64_FMT(tb, DPLL_A_PIN_ESYNC_FREQUENCY, "esync-frequency", " esync-frequency: %" PRIu64 " Hz\n"); diff --git a/man/man8/dpll.8 b/man/man8/dpll.8 index f4cbcfc005c1..f409ba6bb9c5 100644 --- a/man/man8/dpll.8 +++ b/man/man8/dpll.8 @@ -263,7 +263,9 @@ Capabilities (state-can-change, priority-can-change, direction-can-change) .IP \[bu] Phase adjustment range, granularity, and current value .IP \[bu] -Parent device relationships (direction, priority, state, operstate, phase offset) +Fractional frequency offset in ppm (RX vs TX symbol rate on media) +.IP \[bu] +Parent device relationships (direction, priority, state, operstate, phase offset, fractional frequency offset in ppt) .IP \[bu] Parent pin relationships .IP \[bu] -- 2.53.0