From: George Guo The verifier test_loader only runs an __arch_*-tagged test when the tag matches the running architecture. The arena sign-extending load (LDSX) subtests in verifier_ldsx are tagged for x86_64 and arm64 only, so they are skipped on LoongArch even though the JIT now supports the instruction. Tag the arena LDSX subtests (disasm, exception, S8, S16, S32) with __arch_loongarch, and add the expected LoongArch JIT disassembly to the disasm subtest, so they run and are checked there. Signed-off-by: George Guo --- .../testing/selftests/bpf/progs/verifier_ldsx.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/tools/testing/selftests/bpf/progs/verifier_ldsx.c b/tools/testing/selftests/bpf/progs/verifier_ldsx.c index 41340877dc9d..55039dde3dc5 100644 --- a/tools/testing/selftests/bpf/progs/verifier_ldsx.c +++ b/tools/testing/selftests/bpf/progs/verifier_ldsx.c @@ -286,6 +286,19 @@ __jited("add x11, x0, x28") __jited("ldrsh x22, [x11, #0x18]") __jited("add x11, x0, x28") __jited("ldrsb x22, [x11, #0x20]") +__arch_loongarch +__jited("add.d $t2, $a5, $s6") +__jited("ld.w $s2, $t2, 16") +__jited("add.d $t2, $a5, $s6") +__jited("ld.h $s2, $t2, 24") +__jited("add.d $t2, $a5, $s6") +__jited("ld.b $s2, $t2, 32") +__jited("add.d $t2, $a0, $s6") +__jited("ld.w $s3, $t2, 16") +__jited("add.d $t2, $a0, $s6") +__jited("ld.h $s3, $t2, 24") +__jited("add.d $t2, $a0, $s6") +__jited("ld.b $s3, $t2, 32") __naked void arena_ldsx_disasm(void *ctx) { asm volatile ( @@ -317,6 +330,7 @@ __description("Arena LDSX Exception") __success __retval(0) __arch_x86_64 __arch_arm64 +__arch_loongarch __naked void arena_ldsx_exception(void *ctx) { asm volatile ( @@ -338,6 +352,7 @@ __description("Arena LDSX, S8") __success __retval(-1) __arch_x86_64 __arch_arm64 +__arch_loongarch __naked void arena_ldsx_s8(void *ctx) { asm volatile ( @@ -369,6 +384,7 @@ __description("Arena LDSX, S16") __success __retval(-1) __arch_x86_64 __arch_arm64 +__arch_loongarch __naked void arena_ldsx_s16(void *ctx) { asm volatile ( @@ -400,6 +416,7 @@ __description("Arena LDSX, S32") __success __retval(-1) __arch_x86_64 __arch_arm64 +__arch_loongarch __naked void arena_ldsx_s32(void *ctx) { asm volatile ( -- 2.25.1