Initialize the APIC ID in the Secure AVIC APIC backing page with the APIC_ID msr value read from Hypervisor. CPU topology evaluation later during boot would catch and report any duplicate APIC ID for two CPUs. Reviewed-by: Tianyu Lan Signed-off-by: Neeraj Upadhyay --- Changes since v8: - Added Tianyu's Reviewed-by. - Code cleanup. arch/x86/kernel/apic/x2apic_savic.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/x86/kernel/apic/x2apic_savic.c b/arch/x86/kernel/apic/x2apic_savic.c index 86a522685230..55edc6c30ba4 100644 --- a/arch/x86/kernel/apic/x2apic_savic.c +++ b/arch/x86/kernel/apic/x2apic_savic.c @@ -141,6 +141,12 @@ static void savic_setup(void) enum es_result res; unsigned long gpa; + /* + * Before Secure AVIC is enabled, APIC msr reads are intercepted. + * APIC_ID msr read returns the value from the Hypervisor. + */ + apic_set_reg(ap, APIC_ID, native_apic_msr_read(APIC_ID)); + gpa = __pa(ap); /* -- 2.34.1