Note: compile-tested only. Bug found by code inspection. X2APIC_MSR(APIC_xxx + APIC_ISR_NR) is incorrect, since APIC_ISR_NR is 0x8, not 0x80, so shifting it in X2APIC_MSR() results in losing those lower bits, making it simply equal to X2APIC_MSR(APIC_xxx), i.e. making the entire range consist of APIC_xxx only. So adding APIC_ISR_NR needs to be outside X2APIC_MSR(). Additionally, since "..." ranges are inclusive, need to subtract 1. Fixes: dd50294f3e3c ("KVM: TDX: Implement callbacks for MSR operations") Signed-off-by: Dmytro Maluka --- arch/x86/kvm/vmx/tdx.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/x86/kvm/vmx/tdx.c b/arch/x86/kvm/vmx/tdx.c index c5065f84b78b..466a7de660c2 100644 --- a/arch/x86/kvm/vmx/tdx.c +++ b/arch/x86/kvm/vmx/tdx.c @@ -2136,9 +2136,9 @@ bool tdx_has_emulated_msr(u32 index) case X2APIC_MSR(APIC_TASKPRI): case X2APIC_MSR(APIC_PROCPRI): case X2APIC_MSR(APIC_EOI): - case X2APIC_MSR(APIC_ISR) ... X2APIC_MSR(APIC_ISR + APIC_ISR_NR): - case X2APIC_MSR(APIC_TMR) ... X2APIC_MSR(APIC_TMR + APIC_ISR_NR): - case X2APIC_MSR(APIC_IRR) ... X2APIC_MSR(APIC_IRR + APIC_ISR_NR): + case X2APIC_MSR(APIC_ISR) ... X2APIC_MSR(APIC_ISR) + APIC_ISR_NR - 1: + case X2APIC_MSR(APIC_TMR) ... X2APIC_MSR(APIC_TMR) + APIC_ISR_NR - 1: + case X2APIC_MSR(APIC_IRR) ... X2APIC_MSR(APIC_IRR) + APIC_ISR_NR - 1: return false; default: return true; -- 2.53.0.851.ga537e3e6e9-goog