Now that GICv5's ITS is supported, point the MSI-generating devices to PHANDLE_MSI for the GICv5 ITS config. Signed-off-by: Sascha Bischoff --- arm64/pci.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arm64/pci.c b/arm64/pci.c index 79ca34e8..aacaf6b6 100644 --- a/arm64/pci.c +++ b/arm64/pci.c @@ -70,7 +70,8 @@ void pci__generate_fdt_nodes(void *fdt, struct kvm *kvm) _FDT(fdt_property(fdt, "reg", &cfg_reg_prop, sizeof(cfg_reg_prop))); _FDT(fdt_property(fdt, "ranges", ranges, sizeof(ranges))); - if (irqchip == IRQCHIP_GICV2M || irqchip == IRQCHIP_GICV3_ITS) + if (irqchip == IRQCHIP_GICV2M || irqchip == IRQCHIP_GICV3_ITS || + irqchip == IRQCHIP_GICV5_ITS) _FDT(fdt_property_cell(fdt, "msi-parent", PHANDLE_MSI)); /* Generate the interrupt map ... */ -- 2.34.1