rk3588 has a quirk compared to the other Rockchip implementations in that the interface mode configuration register is in the php_grf regmap rather than the grf regmap. Add a flag to indicate this, and a separate function to write to the appropriate regmap. This allows rk3588 to be converted. Signed-off-by: Russell King (Oracle) --- .../net/ethernet/stmicro/stmmac/dwmac-rk.c | 45 ++++++++++++++----- 1 file changed, 35 insertions(+), 10 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c index 35836ffdfc1d..5bbdcc963430 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-rk.c @@ -50,6 +50,7 @@ struct rk_gmac_ops { u16 gmac_phy_intf_sel_mask; u16 gmac_rmii_mode_mask; + bool gmac_grf_reg_in_php; bool php_grf_required; bool regs_valid; u32 regs[]; @@ -126,6 +127,18 @@ static u32 rk_encode_wm16(u16 val, u16 mask) return reg_val; } +static int rk_write_gmac_grf_reg(struct rk_priv_data *bsp_priv, u32 val) +{ + struct regmap *regmap; + + if (bsp_priv->ops->gmac_grf_reg_in_php) + regmap = bsp_priv->php_grf; + else + regmap = bsp_priv->grf; + + return regmap_write(bsp_priv->grf, bsp_priv->gmac_grf_reg, val); +} + static int rk_set_reg_speed(struct rk_priv_data *bsp_priv, const struct rk_reg_speed_data *rsd, unsigned int reg, phy_interface_t interface, @@ -1225,9 +1238,6 @@ static const struct rk_gmac_ops rk3576_ops = { #define RK3588_GRF_GMAC_CON0 0X0008 #define RK3588_GRF_CLK_CON1 0X0070 -#define RK3588_GMAC_PHY_INTF_SEL(id, val) \ - (GRF_FIELD(5, 3, val) << ((id) * 6)) - #define RK3588_GMAC_CLK_RMII_MODE(id) GRF_BIT(5 * (id)) #define RK3588_GMAC_CLK_RGMII_MODE(id) GRF_CLR_BIT(5 * (id)) @@ -1243,6 +1253,22 @@ static const struct rk_gmac_ops rk3576_ops = { #define RK3588_GMAC_CLK_RMII_GATE(id) GRF_BIT(5 * (id) + 1) #define RK3588_GMAC_CLK_RMII_NOGATE(id) GRF_CLR_BIT(5 * (id) + 1) +static int rk3588_init(struct rk_priv_data *bsp_priv) +{ + switch (bsp_priv->id) { + case 0: + bsp_priv->gmac_phy_intf_sel_mask = GENMASK_U16(5, 3); + return 0; + + case 1: + bsp_priv->gmac_phy_intf_sel_mask = GENMASK_U16(11, 9); + return 0; + + default: + return -EINVAL; + } +} + static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv, int tx_delay, int rx_delay) { @@ -1251,9 +1277,6 @@ static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv, offset_con = bsp_priv->id == 1 ? RK3588_GRF_GMAC_CON9 : RK3588_GRF_GMAC_CON8; - regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0, - RK3588_GMAC_PHY_INTF_SEL(id, PHY_INTF_SEL_RGMII)); - regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, RK3588_GMAC_CLK_RGMII_MODE(id)); @@ -1268,9 +1291,6 @@ static void rk3588_set_to_rgmii(struct rk_priv_data *bsp_priv, static void rk3588_set_to_rmii(struct rk_priv_data *bsp_priv) { - regmap_write(bsp_priv->php_grf, RK3588_GRF_GMAC_CON0, - RK3588_GMAC_PHY_INTF_SEL(bsp_priv->id, PHY_INTF_SEL_RMII)); - regmap_write(bsp_priv->php_grf, RK3588_GRF_CLK_CON1, RK3588_GMAC_CLK_RMII_MODE(bsp_priv->id)); } @@ -1323,10 +1343,15 @@ static void rk3588_set_clock_selection(struct rk_priv_data *bsp_priv, bool input } static const struct rk_gmac_ops rk3588_ops = { + .init = rk3588_init, .set_to_rgmii = rk3588_set_to_rgmii, .set_to_rmii = rk3588_set_to_rmii, .set_speed = rk3588_set_gmac_speed, .set_clock_selection = rk3588_set_clock_selection, + + .gmac_grf_reg_in_php = true, + .gmac_grf_reg = RK3588_GRF_GMAC_CON0, + .php_grf_required = true, .regs_valid = true, .regs = { @@ -1712,7 +1737,7 @@ static int rk_gmac_powerup(struct rk_priv_data *bsp_priv) val |= rk_encode_wm16(intf == PHY_INTF_SEL_RMII, bsp_priv->gmac_rmii_mode_mask); - ret = regmap_write(bsp_priv->grf, bsp_priv->gmac_grf_reg, val); + ret = rk_write_gmac_grf_reg(bsp_priv, val); if (ret < 0) return ret; } -- 2.47.3