The MT7531 reset pin is active-low, but several DTS files configured the reset-gpios property without GPIO_ACTIVE_LOW. This causes the reset GPIO to behave as active-high and prevents the switch from being properly reset. Update all affected DTS files to correctly use GPIO_ACTIVE_LOW so that the reset polarity matches the hardware design. Boards fixed: - mt7622-bananapi-bpi-r64 - mt7622-rfb1 - mt7986a-bananapi-bpi-r3 - mt7986a-rfb - mt7986b-rfb Note: the previous DTS description used the wrong polarity but the driver also assumed the opposite polarity, resulting in a matched pair of bugs that worked together. Updating the DTS requires updating the driver at the same time; old kernels will not reset the switch correctly when used with this DTS. Compatibility ------------- Correcting the polarity creates intentional incompatibility: * New kernel + old DTS: The driver now expects active-low, but out-of-tree DTS still marks active-high, causing the reset sequence to invert. * Old kernel + new DTS: The old driver toggles reset assuming active-high, which now conflicts with the corrected active-low DTS. This was unavoidable because the original DTS was factually wrong. Out-of-tree DTS users must update their DTS together with the kernel. Signed-off-by: Chen Minqiang --- arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts | 2 +- arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts | 2 +- arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts | 2 +- arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 2 +- arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts index 9f100b18a676..6f29ce828fdb 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts @@ -155,7 +155,7 @@ interrupt-controller; #interrupt-cells = <1>; interrupts-extended = <&pio 53 IRQ_TYPE_LEVEL_HIGH>; - reset-gpios = <&pio 54 0>; + reset-gpios = <&pio 54 GPIO_ACTIVE_LOW>; ports { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts index 8c3e2e2578bc..6600f06ccebf 100644 --- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts +++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts @@ -137,7 +137,7 @@ switch@0 { compatible = "mediatek,mt7531"; reg = <0>; - reset-gpios = <&pio 54 0>; + reset-gpios = <&pio 54 GPIO_ACTIVE_LOW>; ports { #address-cells = <1>; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts index e7654dc9a1c9..8ec2ec78ee46 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-bananapi-bpi-r3.dts @@ -203,7 +203,7 @@ interrupt-parent = <&pio>; interrupts = <66 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; - reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>; + reset-gpios = <&pio 5 GPIO_ACTIVE_LOW>; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts index 5d8e3d3f6c20..958ce291336b 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts @@ -87,7 +87,7 @@ switch: switch@0 { compatible = "mediatek,mt7531"; reg = <31>; - reset-gpios = <&pio 5 0>; + reset-gpios = <&pio 5 1>; }; }; diff --git a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts index 58f77d932429..0780b5a36259 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts +++ b/arch/arm64/boot/dts/mediatek/mt7986b-rfb.dts @@ -64,7 +64,7 @@ switch@0 { compatible = "mediatek,mt7531"; reg = <31>; - reset-gpios = <&pio 5 0>; + reset-gpios = <&pio 5 1>; ports { #address-cells = <1>; -- 2.17.1