--- drivers/net/dsa/mv88e6xxx/chip.h | 16 +-- drivers/net/dsa/mv88e6xxx/hwtstamp.c | 151 +++++++-------------------- drivers/net/dsa/mv88e6xxx/hwtstamp.h | 11 -- 3 files changed, 36 insertions(+), 142 deletions(-) diff --git a/drivers/net/dsa/mv88e6xxx/chip.h b/drivers/net/dsa/mv88e6xxx/chip.h index 0c41b5595dd3..db95265efa02 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.h +++ b/drivers/net/dsa/mv88e6xxx/chip.h @@ -219,19 +219,6 @@ struct mv88e6xxx_irq { int nirqs; }; -/* state flags for mv88e6xxx_port_hwtstamp::state */ -enum { - MV88E6XXX_HWTSTAMP_ENABLED, -}; - -struct mv88e6xxx_port_hwtstamp { - /* Timestamping state */ - unsigned long state; - - /* Current timestamp configuration */ - struct kernel_hwtstamp_config tstamp_config; -}; - enum mv88e6xxx_policy_mapping { MV88E6XXX_POLICY_MAPPING_DA, MV88E6XXX_POLICY_MAPPING_SA, @@ -403,16 +390,15 @@ struct mv88e6xxx_chip { struct marvell_tai *tai; struct ptp_pin_desc pin_config[MV88E6XXX_MAX_GPIO]; - u16 enable_count; /* Current ingress and egress monitor ports */ int egress_dest_port; int ingress_dest_port; /* Per-port timestamping resources. */ - struct mv88e6xxx_port_hwtstamp port_hwtstamp[DSA_MAX_PORTS]; struct marvell_ts ptp_ts[DSA_MAX_PORTS]; struct marvell_ts_caps ptp_caps; + u16 ptp_ts_enable_count; /* Array of port structures. */ struct mv88e6xxx_port ports[DSA_MAX_PORTS]; diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.c b/drivers/net/dsa/mv88e6xxx/hwtstamp.c index fd4afb5e4d49..4f6b2706a8be 100644 --- a/drivers/net/dsa/mv88e6xxx/hwtstamp.c +++ b/drivers/net/dsa/mv88e6xxx/hwtstamp.c @@ -82,9 +82,7 @@ static int mv88e6xxx_ptp_read(struct mv88e6xxx_chip *chip, int addr, int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port, struct kernel_ethtool_ts_info *info) { - struct mv88e6xxx_chip *chip; - - chip = ds->priv; + struct mv88e6xxx_chip *chip = ds->priv; if (!chip->info->ptp_support) return -EOPNOTSUPP; @@ -94,119 +92,24 @@ int mv88e6xxx_get_ts_info(struct dsa_switch *ds, int port, return 0; } -static int mv88e6xxx_set_hwtstamp_config(struct mv88e6xxx_chip *chip, int port, - struct kernel_hwtstamp_config *config) -{ - const struct mv88e6xxx_ptp_ops *ptp_ops = chip->info->ops->ptp_ops; - struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; - bool tstamp_enable = false; - - /* Prevent the TX/RX paths from trying to interact with the - * timestamp hardware while we reconfigure it. - */ - clear_bit_unlock(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state); - - switch (config->tx_type) { - case HWTSTAMP_TX_OFF: - tstamp_enable = false; - break; - case HWTSTAMP_TX_ON: - tstamp_enable = true; - break; - default: - return -ERANGE; - } - - /* The switch supports timestamping both L2 and L4; one cannot be - * disabled independently of the other. - */ - - if (!(BIT(config->rx_filter) & ptp_ops->rx_filters)) { - config->rx_filter = HWTSTAMP_FILTER_NONE; - dev_dbg(chip->dev, "Unsupported rx_filter %d\n", - config->rx_filter); - return -ERANGE; - } - - switch (config->rx_filter) { - case HWTSTAMP_FILTER_NONE: - tstamp_enable = false; - break; - case HWTSTAMP_FILTER_PTP_V2_L4_EVENT: - case HWTSTAMP_FILTER_PTP_V2_L4_SYNC: - case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ: - case HWTSTAMP_FILTER_PTP_V2_L2_EVENT: - case HWTSTAMP_FILTER_PTP_V2_L2_SYNC: - case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ: - case HWTSTAMP_FILTER_PTP_V2_EVENT: - case HWTSTAMP_FILTER_PTP_V2_SYNC: - case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ: - config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT; - break; - case HWTSTAMP_FILTER_ALL: - default: - config->rx_filter = HWTSTAMP_FILTER_NONE; - return -ERANGE; - } - - mv88e6xxx_reg_lock(chip); - if (tstamp_enable) { - chip->enable_count += 1; - if (chip->enable_count == 1 && ptp_ops->global_enable) - ptp_ops->global_enable(chip); - if (ptp_ops->port_enable) - ptp_ops->port_enable(chip, port); - } else { - if (ptp_ops->port_disable) - ptp_ops->port_disable(chip, port); - chip->enable_count -= 1; - if (chip->enable_count == 0 && ptp_ops->global_disable) - ptp_ops->global_disable(chip); - } - mv88e6xxx_reg_unlock(chip); - - /* Once hardware has been configured, enable timestamp checks - * in the RX/TX paths. - */ - if (tstamp_enable) - set_bit(MV88E6XXX_HWTSTAMP_ENABLED, &ps->state); - - return 0; -} - int mv88e6xxx_port_hwtstamp_set(struct dsa_switch *ds, int port, struct kernel_hwtstamp_config *config, struct netlink_ext_ack *extack) { struct mv88e6xxx_chip *chip = ds->priv; - struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; - int err; if (!chip->info->ptp_support) return -EOPNOTSUPP; - err = mv88e6xxx_set_hwtstamp_config(chip, port, config); - if (err) - return err; - - /* Save the chosen configuration to be returned later. */ - ps->tstamp_config = *config; - - return 0; + return marvell_ts_hwtstamp_set(&chip->ptp_ts[port], config, extack); } int mv88e6xxx_port_hwtstamp_get(struct dsa_switch *ds, int port, struct kernel_hwtstamp_config *config) { struct mv88e6xxx_chip *chip = ds->priv; - struct mv88e6xxx_port_hwtstamp *ps = &chip->port_hwtstamp[port]; - - if (!chip->info->ptp_support) - return -EOPNOTSUPP; - *config = ps->tstamp_config; - - return 0; + return marvell_ts_hwtstamp_get(&chip->ptp_ts[port], config); } bool mv88e6xxx_port_rxtstamp(struct dsa_switch *ds, int port, @@ -316,6 +219,36 @@ static int mv88e6xxx_ts_global_write(struct device *dev, u8 reg, u16 val) return chip->info->ops->avb_ops->ptp_write(chip, reg, val); } +static int mv88e6xxx_ts_port_enable(struct device *dev, u8 port) +{ + struct mv88e6xxx_chip *chip = dev_to_chip(dev); + const struct mv88e6xxx_ptp_ops *ptp_ops; + + ptp_ops = chip->info->ops->ptp_ops; + if (ptp_ops->global_enable) { + mv88e6xxx_reg_lock(chip); + if (!chip->ptp_ts_enable_count++) + ptp_ops->global_enable(chip); + mv88e6xxx_reg_unlock(chip); + } + + return 0; +} + +static void mv88e6xxx_ts_port_disable(struct device *dev, u8 port) +{ + struct mv88e6xxx_chip *chip = dev_to_chip(dev); + const struct mv88e6xxx_ptp_ops *ptp_ops; + + ptp_ops = chip->info->ops->ptp_ops; + if (ptp_ops->global_disable) { + mv88e6xxx_reg_lock(chip); + if (!--chip->ptp_ts_enable_count) + ptp_ops->global_disable(chip); + mv88e6xxx_reg_unlock(chip); + } +} + /* The device differences are: * ts_reg MV88E6165 Others * TS_ARR0 MV88E6165_PORT_PTP_ARR0_STS MV88E6XXX_PORT_PTP_ARR0_STS @@ -423,6 +356,8 @@ static int mv88e6xxx_ts_port_modify(struct device *dev, u8 port, u8 reg, static const struct marvell_ts_ops mv88e6xxx_ts_ops = { .ts_global_write = mv88e6xxx_ts_global_write, + .ts_port_enable = mv88e6xxx_ts_port_enable, + .ts_port_disable = mv88e6xxx_ts_port_disable, .ts_port_read_ts = mv88e6xxx_ts_port_read_ts, .ts_port_write = mv88e6xxx_ts_port_write, .ts_port_modify = mv88e6xxx_ts_port_modify, @@ -455,22 +390,6 @@ int mv88e6xxx_hwtstamp_setup(struct mv88e6xxx_chip *chip) if (err) return err; - /* MV88E6XXX_PTP_MSG_TYPE is a mask of PTP message types to - * timestamp. This affects all ports that have timestamping enabled, - * but the timestamp config is per-port; thus we configure all events - * here and only support the HWTSTAMP_FILTER_*_EVENT filter types. - */ - err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_MSGTYPE, - MV88E6XXX_PTP_MSGTYPE_ALL_EVENT); - if (err) - return err; - - /* Use ARRIVAL1 for peer delay response messages. */ - err = mv88e6xxx_ptp_write(chip, MV88E6XXX_PTP_TS_ARRIVAL_PTR, - MV88E6XXX_PTP_MSGTYPE_PDLAY_RES); - if (err) - return err; - /* 88E6341 devices default to timestamping at the PHY, but this has * a hardware issue that results in unreliable timestamps. Force * these devices to timestamp at the MAC. diff --git a/drivers/net/dsa/mv88e6xxx/hwtstamp.h b/drivers/net/dsa/mv88e6xxx/hwtstamp.h index f6182658c971..caeee3b1256d 100644 --- a/drivers/net/dsa/mv88e6xxx/hwtstamp.h +++ b/drivers/net/dsa/mv88e6xxx/hwtstamp.h @@ -19,17 +19,6 @@ /* Offset 0x00: PTP EtherType */ #define MV88E6XXX_PTP_ETHERTYPE 0x00 -/* Offset 0x01: Message Type Timestamp Enables */ -#define MV88E6XXX_PTP_MSGTYPE 0x01 -#define MV88E6XXX_PTP_MSGTYPE_SYNC 0x0001 -#define MV88E6XXX_PTP_MSGTYPE_DELAY_REQ 0x0002 -#define MV88E6XXX_PTP_MSGTYPE_PDLAY_REQ 0x0004 -#define MV88E6XXX_PTP_MSGTYPE_PDLAY_RES 0x0008 -#define MV88E6XXX_PTP_MSGTYPE_ALL_EVENT 0x000f - -/* Offset 0x02: Timestamp Arrival Capture Pointers */ -#define MV88E6XXX_PTP_TS_ARRIVAL_PTR 0x02 - /* Offset 0x05: PTP Global Configuration */ #define MV88E6165_PTP_CFG 0x05 #define MV88E6165_PTP_CFG_TSPEC_MASK 0xf000 -- 2.47.3