Microchip PSE controllers have a dedicated port disable input that like it name suggest, will disable PoE on all ports. So, lets document that GPIO. Acked-by: Rob Herring (Arm) Signed-off-by: Robert Marko --- Changes in v2: * Pick Acked-by from Rob .../devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml index ca61cc37a790..ca4200afa793 100644 --- a/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml +++ b/Documentation/devicetree/bindings/net/pse-pd/microchip,pd692x0.yaml @@ -22,6 +22,10 @@ properties: reg: maxItems: 1 + disable-ports-gpios: + description: GPIO pin to disable PoE on all ports + maxItems: 1 + vdd-supply: description: Regulator that provides 3.3V VDD power supply. -- 2.54.0