RealTek 2.5GE PHYs have all standard Clause-22 registers mapped also inside MDIO_MMD_VEND2 at offset 0xa400. This is used mainly in case the PHY is connected to a Clause-45-only bus. The RTL8221B is frequently used in copper SFP module which uses the RollBall MDIO-over-I2C method which *only* supports Clause-45, for example. In order to support using the PHY on Clause-45-only busses, the PHY driver has previously been split into a C22-only and C45-only instances, creating quite a bit of redundancy and confusion. In preparation of reunifying the two driver instances, add support for translating MDIO_MMD_VEND2 registers 0xa400 to 0xa43c back to Clause-22 registers 0 to 30 in case the PHY is accessed on a Clause-22 bus. Signed-off-by: Daniel Golle --- v2: improve commit message drivers/net/phy/realtek/realtek_main.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realtek/realtek_main.c index 18eea6b4b59a6..74980b2d66157 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -144,6 +144,7 @@ #define RTL822X_VND2_TO_PAGE(reg) ((reg) >> 4) #define RTL822X_VND2_TO_PAGE_REG(reg) (16 + (((reg) & GENMASK(3, 0)) >> 1)) +#define RTL822X_VND2_TO_C22_REG(reg) (((reg) - 0xa400) / 2) #define RTL822X_VND2_C22_REG(reg) (0xa400 + 2 * (reg)) #define RTL8221B_VND2_INER 0xa4d2 @@ -1265,6 +1266,11 @@ static int rtl822xb_read_mmd(struct phy_device *phydev, int devnum, u16 reg) return mmd_phy_read(phydev->mdio.bus, phydev->mdio.addr, phydev->is_c45, devnum, reg); + /* Simplify access to C22-registers addressed inside MDIO_MMD_VEND2 */ + if (reg >= RTL822X_VND2_C22_REG(0) && + reg <= RTL822X_VND2_C22_REG(30)) + return __phy_read(phydev, RTL822X_VND2_TO_C22_REG(reg)); + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ page = RTL822X_VND2_TO_PAGE(reg); oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT); @@ -1300,6 +1306,11 @@ static int rtl822xb_write_mmd(struct phy_device *phydev, int devnum, u16 reg, return mmd_phy_write(phydev->mdio.bus, phydev->mdio.addr, phydev->is_c45, devnum, reg, val); + /* Simplify access to C22-registers addressed inside MDIO_MMD_VEND2 */ + if (reg >= RTL822X_VND2_C22_REG(0) && + reg <= RTL822X_VND2_C22_REG(30)) + return __phy_write(phydev, RTL822X_VND2_TO_C22_REG(reg), val); + /* Use paged access for MDIO_MMD_VEND2 over Clause-22 */ page = RTL822X_VND2_TO_PAGE(reg); oldpage = __phy_read(phydev, RTL821x_PAGE_SELECT); -- 2.52.0