The inline asm in the arena tests writes the two address spaces of addr_space_cast() in hex which trips up a GNU assembler bug: progs/jit_insns_arena.c:49: Error: unrecognized instruction `r7 =addr_space_cast(r7,0x0,0x1)' progs/jit_insns_arena.c:49: Error: expected ',', got 'x' This has been fixed and landed binutils commit 835aee81fa93 ("bpf: accept any spelling of the addr_space_cast address spaces"), but will only land in the 2.47 release, so add the workarounds for now. A GCC that defines __BPF_FEATURE_ADDR_SPACE_CAST would be paired with a capable binutils. No functional change. Signed-off-by: Vineet Gupta --- v3 -> v4: new patch. .../selftests/bpf/progs/arena_atomics.c | 32 +++++++++---------- .../selftests/bpf/progs/jit_insns_arena.c | 8 ++--- .../selftests/bpf/progs/verifier_arena.c | 16 +++++----- .../selftests/bpf/progs/verifier_hmul_arena.c | 4 +-- .../selftests/bpf/progs/verifier_ldsx.c | 10 +++--- 5 files changed, 35 insertions(+), 35 deletions(-) diff --git a/tools/testing/selftests/bpf/progs/arena_atomics.c b/tools/testing/selftests/bpf/progs/arena_atomics.c index ce76a73d197b..2a9664f54399 100644 --- a/tools/testing/selftests/bpf/progs/arena_atomics.c +++ b/tools/testing/selftests/bpf/progs/arena_atomics.c @@ -227,11 +227,11 @@ int fetch_r0(const void *ctx) #if defined(ENABLE_ATOMICS_TESTS) && defined(__BPF_FEATURE_ADDR_SPACE_CAST) asm volatile ( "r1 = %[fetch_src_r0_value] ll;" - "r1 = addr_space_cast(r1, 0x0, 0x1);" + "r1 = addr_space_cast(r1, 0, 1);" "r0 = 0x1100000011 ll;" ".8byte %[fetch_src_r0_insn];" "r2 = %[fetch_src_r0_result] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r0;" : : __imm_addr(fetch_src_r0_value), @@ -242,16 +242,16 @@ int fetch_r0(const void *ctx) asm volatile ( "r0 = %[fetch_dst_r0_value] ll;" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 0x1100000011 ll;" ".8byte %[fetch_dst_r0_insn];" "r2 = %[fetch_dst_r0_result] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r1;" /* r0 is only read by the atomic, so it must still be the pointer. */ "r3 = *(u64 *)(r0 + 0);" "r2 = %[fetch_dst_r0_readback] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r3;" : : __imm_addr(fetch_dst_r0_value), @@ -363,17 +363,17 @@ int uaf(const void *ctx) asm volatile ( "r0 = %[page];" "r0 += 4096;" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 1;" "r2 = %[uaf_r0_before_dst_r0] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r0;" ".8byte %[fetch_dst_r0];" "r2 = %[uaf_r0_after_dst_r0] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r0;" "r2 = %[uaf_r1_after_dst_r0] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r1;" : : [page]"r"(page64), __imm_insn(fetch_dst_r0, @@ -387,11 +387,11 @@ int uaf(const void *ctx) asm volatile ( "r1 = %[page];" "r1 += 4096;" - "r1 = addr_space_cast(r1, 0x0, 0x1);" + "r1 = addr_space_cast(r1, 0, 1);" "r0 = 1;" ".8byte %[fetch_src_r0];" "r2 = %[uaf_r0_after_src_r0] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r0;" : : [page]"r"(page64), __imm_insn(fetch_src_r0, @@ -409,10 +409,10 @@ int uaf(const void *ctx) asm volatile ( "r1 = %[page];" "r1 += 4096;" - "r1 = addr_space_cast(r1, 0x0, 0x1);" + "r1 = addr_space_cast(r1, 0, 1);" "r3 = *(u64 *)(r1 + 0);" "r2 = %[uaf_reread] ll;" - "r2 = addr_space_cast(r2, 0x0, 0x1);" + "r2 = addr_space_cast(r2, 0, 1);" "*(u64 *)(r2 + 0) = r3;" : : [page]"r"(page64), __imm_addr(uaf_reread) @@ -460,10 +460,10 @@ int load_acquire(const void *ctx) #define LOAD_ACQUIRE_ARENA(SIZEOP, SIZE, SRC, DST) \ { asm volatile ( \ "r1 = %[" #SRC "] ll;" \ - "r1 = addr_space_cast(r1, 0x0, 0x1);" \ + "r1 = addr_space_cast(r1, 0, 1);" \ ".8byte %[load_acquire_insn];" \ "r3 = %[" #DST "] ll;" \ - "r3 = addr_space_cast(r3, 0x0, 0x1);" \ + "r3 = addr_space_cast(r3, 0, 1);" \ "*(" #SIZE " *)(r3 + 0) = r2;" \ : \ : __imm_addr(SRC), \ @@ -515,7 +515,7 @@ int store_release(const void *ctx) { asm volatile ( \ "r1 = " VAL ";" \ "r2 = %[" #DST "] ll;" \ - "r2 = addr_space_cast(r2, 0x0, 0x1);" \ + "r2 = addr_space_cast(r2, 0, 1);" \ ".8byte %[store_release_insn];" \ : \ : __imm_addr(DST), \ diff --git a/tools/testing/selftests/bpf/progs/jit_insns_arena.c b/tools/testing/selftests/bpf/progs/jit_insns_arena.c index 95736eae2a58..997a897d66eb 100644 --- a/tools/testing/selftests/bpf/progs/jit_insns_arena.c +++ b/tools/testing/selftests/bpf/progs/jit_insns_arena.c @@ -47,7 +47,7 @@ int arena_zero_off(void *ctx) /* Accesses through two base registers */ asm volatile (" \ r7 = %[res]; \ - r7 = addr_space_cast(r7, 0x0, 0x1); \ + r7 = addr_space_cast(r7, 0, 1); \ r1 = r7; \ r8 = 0x1122334455667788 ll; \ *(u64 *)(r7 + 0) = r8; \ @@ -93,12 +93,12 @@ int cast_to_user(void *ctx) /* The user address comes back from the kernel one, NULL stays NULL */ asm volatile (" \ r7 = %[page]; \ - r1 = addr_space_cast(r7, 0x0, 0x1); \ - r1 = addr_space_cast(r1, 0x1, 0x0); \ + r1 = addr_space_cast(r7, 0, 1); \ + r1 = addr_space_cast(r1, 1, 0); \ r9 = r1; \ r9 ^= r7; \ r2 = 0; \ - r2 = addr_space_cast(r2, 0x1, 0x0); \ + r2 = addr_space_cast(r2, 1, 0); \ r9 |= r2; \ %[res] = r9; \ " : [res]"=r"(res) diff --git a/tools/testing/selftests/bpf/progs/verifier_arena.c b/tools/testing/selftests/bpf/progs/verifier_arena.c index b17a6dfc100d..9b149c724160 100644 --- a/tools/testing/selftests/bpf/progs/verifier_arena.c +++ b/tools/testing/selftests/bpf/progs/verifier_arena.c @@ -524,7 +524,7 @@ int scalar_add_arena_ptr(void *ctx) asm volatile ( "%[arena_ptr] = 8192;" - "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0x0, 0x1);" + "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0, 1);" "%[scalar] = 12;" "%[scalar] += %[arena_ptr];" : [scalar] "=r"(scalar), @@ -549,9 +549,9 @@ int arena_ptr_add_arena_ptr(void *ctx) asm volatile ( "%[arena_ptr1] = 8192;" - "%[arena_ptr1] = addr_space_cast(%[arena_ptr1], 0x0, 0x1);" + "%[arena_ptr1] = addr_space_cast(%[arena_ptr1], 0, 1);" "%[arena_ptr2] = 4096;" - "%[arena_ptr2] = addr_space_cast(%[arena_ptr2], 0x0, 0x1);" + "%[arena_ptr2] = addr_space_cast(%[arena_ptr2], 0, 1);" "%[arena_ptr2] += %[arena_ptr1];" : [arena_ptr2] "=r"(arena_ptr2), [arena_ptr1] "=&r"(arena_ptr1) @@ -574,7 +574,7 @@ int mixed_arena_scalar_alu64_scalar_first(void *ctx) asm volatile ( "r9 = %[arena] ll;" "%[reg] = 0;" - "%[reg] = addr_space_cast(%[reg], 0x0, 0x1);" + "%[reg] = addr_space_cast(%[reg], 0, 1);" : [reg] "=r"(reg) : __imm_addr(arena) : "r9" @@ -596,7 +596,7 @@ int mixed_arena_scalar_alu64_arena_first(void *ctx) asm volatile ( "r9 = %[arena] ll;" "%[reg] = 0;" - "%[reg] = addr_space_cast(%[reg], 0x0, 0x1);" + "%[reg] = addr_space_cast(%[reg], 0, 1);" : [reg] "=r"(reg) : __imm_addr(arena) : "r9" @@ -635,7 +635,7 @@ int scalar_xor_arena_ptr(void *ctx) asm volatile ( "%[arena_ptr] = 8192;" - "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0x0, 0x1);" + "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0, 1);" "%[scalar] = 12;" "%[scalar] ^= %[arena_ptr];" : [scalar] "=r"(scalar), @@ -660,7 +660,7 @@ int arena_ptr_add_to_non_arena_ptr(void *ctx) asm volatile ( "%[arena_ptr] = 8192;" - "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0x0, 0x1);" + "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0, 1);" "%[dst] = %[ctx];" "%[dst] += %[arena_ptr];" : [arena_ptr] "=&r"(arena_ptr), @@ -685,7 +685,7 @@ int non_arena_ptr_add_to_arena_ptr(void *ctx) asm volatile ( "%[arena_ptr] = 8192;" - "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0x0, 0x1);" + "%[arena_ptr] = addr_space_cast(%[arena_ptr], 0, 1);" "%[src] = %[ctx];" "%[arena_ptr] += %[src];" : [arena_ptr] "=&r"(arena_ptr), diff --git a/tools/testing/selftests/bpf/progs/verifier_hmul_arena.c b/tools/testing/selftests/bpf/progs/verifier_hmul_arena.c index a8709ec447aa..b94892fff2f8 100644 --- a/tools/testing/selftests/bpf/progs/verifier_hmul_arena.c +++ b/tools/testing/selftests/bpf/progs/verifier_hmul_arena.c @@ -29,7 +29,7 @@ __naked void uhmul64_arena_ptr(void) asm volatile ( "r1 = %[arena] ll;" "r0 = 1;" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" ".8byte %[hmul];" "exit;" : @@ -48,7 +48,7 @@ __naked void shmul64_arena_ptr(void) asm volatile ( "r1 = %[arena] ll;" "r1 = 1;" - "r1 = addr_space_cast(r1, 0x0, 0x1);" + "r1 = addr_space_cast(r1, 0, 1);" "r0 = 2;" ".8byte %[hmul];" "exit;" diff --git a/tools/testing/selftests/bpf/progs/verifier_ldsx.c b/tools/testing/selftests/bpf/progs/verifier_ldsx.c index 49e8cd4bb4f9..45b2e52fd715 100644 --- a/tools/testing/selftests/bpf/progs/verifier_ldsx.c +++ b/tools/testing/selftests/bpf/progs/verifier_ldsx.c @@ -310,7 +310,7 @@ __naked void arena_ldsx_disasm(void *ctx) "r4 = %[numa_no_node];" "r5 = 0;" "call %[bpf_arena_alloc_pages];" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = r0;" "r8 = *(s32 *)(r0 + 16);" "r8 = *(s16 *)(r0 + 24);" @@ -338,7 +338,7 @@ __naked void arena_ldsx_exception(void *ctx) asm volatile ( "r1 = %[arena] ll;" "r0 = 0xdeadbeef;" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 0x3fe;" "*(u64 *)(r0 + 0) = r1;" "r0 = *(s8 *)(r0 + 0);" @@ -364,7 +364,7 @@ __naked void arena_ldsx_s8(void *ctx) "r4 = %[numa_no_node];" "r5 = 0;" "call %[bpf_arena_alloc_pages];" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 0x3fe;" "*(u64 *)(r0 + 0) = r1;" #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -396,7 +396,7 @@ __naked void arena_ldsx_s16(void *ctx) "r4 = %[numa_no_node];" "r5 = 0;" "call %[bpf_arena_alloc_pages];" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 0x3fffe;" "*(u64 *)(r0 + 0) = r1;" #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ @@ -428,7 +428,7 @@ __naked void arena_ldsx_s32(void *ctx) "r4 = %[numa_no_node];" "r5 = 0;" "call %[bpf_arena_alloc_pages];" - "r0 = addr_space_cast(r0, 0x0, 0x1);" + "r0 = addr_space_cast(r0, 0, 1);" "r1 = 0xfffffffe;" "*(u64 *)(r0 + 0) = r1;" #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ -- 2.53.0-Meta