Convert compile-time #ifdef blocks to IS_ENABLED() conditionals for better compile coverage and more idiomatic kernel code. Affected functions: emac_rx_clk_tx, emac_rx_clk_default, emac_reset, emac_init_phy in core.c, and mal_txeob/mal_rxeob in mal.c. Assisted-by: opencode:big-pickle Signed-off-by: Rosen Penev --- drivers/net/ethernet/ibm/emac/core.c | 41 ++++++++++++---------------- drivers/net/ethernet/ibm/emac/mal.c | 14 ++++------ 2 files changed, 23 insertions(+), 32 deletions(-) diff --git a/drivers/net/ethernet/ibm/emac/core.c b/drivers/net/ethernet/ibm/emac/core.c index aed1ad21e2ea..dba3cdfea340 100644 --- a/drivers/net/ethernet/ibm/emac/core.c +++ b/drivers/net/ethernet/ibm/emac/core.c @@ -139,20 +139,18 @@ static inline void emac_report_timeout_error(struct emac_instance *dev, */ static inline void emac_rx_clk_tx(struct emac_instance *dev) { -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS >> dev->cell_index); -#endif } static inline void emac_rx_clk_default(struct emac_instance *dev) { -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS >> dev->cell_index, 0); -#endif } /* PHY polling intervals */ @@ -339,7 +337,7 @@ static int emac_reset(struct emac_instance *dev) { struct emac_regs __iomem *p = dev->emacp; int n = 20; - bool __maybe_unused try_internal_clock = false; + bool try_internal_clock = false; DBG(dev, "reset" NL); @@ -351,8 +349,6 @@ static int emac_reset(struct emac_instance *dev) emac_tx_disable(dev); } -#ifdef CONFIG_PPC_DCR_NATIVE -do_retry: /* * PPC460EX/GT Embedded Processor Advanced User's Manual * section 28.10.1 Mode Register 0 (EMACx_MR0) states: @@ -370,7 +366,9 @@ static int emac_reset(struct emac_instance *dev) * driver will temporarily switch to the internal clock, after * the first reset fails. */ - if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { +retry: + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { if (try_internal_clock || (dev->phy_address == 0xffffffff && dev->phy_map == 0xffffffff)) { /* No PHY: select internal loop clock before reset */ @@ -382,19 +380,18 @@ static int emac_reset(struct emac_instance *dev) SDR0_ETH_CFG_ECS << dev->cell_index, 0); } } -#endif out_be32(&p->mr0, EMAC_MR0_SRST); while ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n) --n; -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { if (!n && !try_internal_clock) { /* first attempt has timed out. */ n = 20; try_internal_clock = true; - goto do_retry; + goto retry; } if (try_internal_clock || (dev->phy_address == 0xffffffff && @@ -404,7 +401,6 @@ static int emac_reset(struct emac_instance *dev) SDR0_ETH_CFG_ECS << dev->cell_index, 0); } } -#endif if (n) { dev->reset_failed = 0; @@ -2754,18 +2750,16 @@ static int emac_init_phy(struct emac_instance *dev) dev->phy.mdio_write = emac_mdio_write; /* Enable internal clock source */ -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS); -#endif /* PHY clock workaround */ emac_rx_clk_tx(dev); /* Enable internal clock source on 440GX*/ -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS); -#endif /* Configure EMAC with defaults so we can at least use MDIO * This is needed mostly for 440GX */ @@ -2825,10 +2819,9 @@ static int emac_init_phy(struct emac_instance *dev) } /* Enable external clock source */ -#ifdef CONFIG_PPC_DCR_NATIVE - if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0); -#endif mutex_unlock(&emac_phy_map_lock); if (i == 0x20) { printk(KERN_WARNING "%pOF: can't find PHY!\n", np); diff --git a/drivers/net/ethernet/ibm/emac/mal.c b/drivers/net/ethernet/ibm/emac/mal.c index d12a376f69fd..2adfd9d9bdb1 100644 --- a/drivers/net/ethernet/ibm/emac/mal.c +++ b/drivers/net/ethernet/ibm/emac/mal.c @@ -282,11 +282,10 @@ static irqreturn_t mal_txeob(int irq, void *dev_instance) mal_schedule_poll(mal); set_mal_dcrn(mal, MAL_TXEOBISR, r); -#ifdef CONFIG_PPC_DCR_NATIVE - if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) mtdcri(SDR0, DCRN_SDR_ICINTSTAT, - (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX)); -#endif + (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICTX)); return IRQ_HANDLED; } @@ -302,11 +301,10 @@ static irqreturn_t mal_rxeob(int irq, void *dev_instance) mal_schedule_poll(mal); set_mal_dcrn(mal, MAL_RXEOBISR, r); -#ifdef CONFIG_PPC_DCR_NATIVE - if (mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) + if (IS_ENABLED(CONFIG_PPC_DCR_NATIVE) && + mal_has_feature(mal, MAL_FTR_CLEAR_ICINTSTAT)) mtdcri(SDR0, DCRN_SDR_ICINTSTAT, - (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX)); -#endif + (mfdcri(SDR0, DCRN_SDR_ICINTSTAT) | ICINTSTAT_ICRX)); return IRQ_HANDLED; } -- 2.54.0