From: Nazim Amirul The Agilex5 SoCDK TSN Config2 board uses a GMII-to-RGMII converter implemented as FPGA soft IP between gmac1 and its PHY. This converter provides the RGMII TX/RX clock delays. Document a new compatible string for this MAC variant so the driver can detect it and configure the interface accordingly. Signed-off-by: Nazim Amirul --- v4: No changes from v2. .../devicetree/bindings/net/altr,socfpga-stmmac.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml index 63084f762373..81f030986fa3 100644 --- a/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml +++ b/Documentation/devicetree/bindings/net/altr,socfpga-stmmac.yaml @@ -24,6 +24,7 @@ select: - altr,socfpga-stmmac - altr,socfpga-stmmac-a10-s10 - altr,socfpga-stmmac-agilex5 + - altr,socfpga-stmmac-agilex5-tsn required: - compatible @@ -46,6 +47,10 @@ properties: - items: - const: altr,socfpga-stmmac-agilex5 - const: snps,dwxgmac-2.10 + - items: + - const: altr,socfpga-stmmac-agilex5-tsn + - const: altr,socfpga-stmmac-agilex5 + - const: snps,dwxgmac-2.10 clocks: minItems: 1 -- 2.43.7