7.3-stable review patch. If anyone has any objections, please let me know. ------------------ From: Lorenzo Pieralisi [ Upstream commit 64212d63193cfd81849f5948365c7b0ecd011745 ] An IRS is architecturally allowed to be standalone, namely, with no direct CPUs connections. Make sure such configuration is allowed on OF firmware by skipping "cpus" and "arm,iaffids" IRS node properties parsing if they are not present so that the IRS configuration can complete successfully. Fixes: 5cb1b6dab2de ("irqchip/gic-v5: Add GICv5 IRS/SPI support") Signed-off-by: Lorenzo Pieralisi Signed-off-by: Thomas Gleixner Reviewed-by: Sascha Bischoff Link: https://patch.msgid.link/20261015-gicv5-irs-no-cpus-v1-2-d4b337b7f000@kernel.org Signed-off-by: Sasha Levin --- drivers/irqchip/irq-gic-v5-irs.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/irqchip/irq-gic-v5-irs.c b/drivers/irqchip/irq-gic-v5-irs.c index 4486645a4b6f2..fb1cecef613b3 100644 --- a/drivers/irqchip/irq-gic-v5-irs.c +++ b/drivers/irqchip/irq-gic-v5-irs.c @@ -609,6 +609,10 @@ static int __init gicv5_irs_of_init_affinity(struct device_node *node, u16 iaffid_mask = GENMASK(iaffid_bits - 1, 0); int ret, i, ncpus, niaffids; + /* An IRS is architecturally allowed to have no cpus associated with it */ + if (!of_property_present(node, "cpus") && !of_property_present(node, "arm,iaffids")) + return 0; + ncpus = of_count_phandle_with_args(node, "cpus", NULL); if (ncpus < 0) return -EINVAL; -- 2.53.0