Add a Rust implementation of the LSI ET1011C PHY driver, equivalent to the existing C driver in drivers/net/phy/et1011c.c. The driver implements config_aneg and read_status callbacks using the Rust PHY abstraction. The Rust driver uses the new speed() getter to detect speed changes, only reconfiguring the TX FIFO depth and GMII interface when the negotiated speed actually changes. This matches the C driver behavior. The Rust driver can be selected via the ET1011C_RUST_PHY Kconfig option, following the same pattern as AX88796B_RUST_PHY. Signed-off-by: Artem Lytkin --- drivers/net/phy/Kconfig | 9 ++++ drivers/net/phy/Makefile | 6 ++- drivers/net/phy/et1011c_rust.rs | 75 +++++++++++++++++++++++++++++++++ 3 files changed, 89 insertions(+), 1 deletion(-) create mode 100644 drivers/net/phy/et1011c_rust.rs diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 7b73332a13d9..5271898a38f7 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -254,6 +254,15 @@ config LSI_ET1011C_PHY help Supports the LSI ET1011C PHY. +config ET1011C_RUST_PHY + bool "Rust reference driver for LSI ET1011C PHY" + depends on RUST_PHYLIB_ABSTRACTIONS && LSI_ET1011C_PHY + help + Uses the Rust reference driver for LSI ET1011C PHY + (et1011c_rust.ko). The features and behavior are + equivalent to the C driver. Selecting this option builds + the Rust version instead of the C version. + config MARVELL_PHY tristate "Marvell Alaska PHYs" help diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index 3a34917adea7..491469457a67 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -62,7 +62,11 @@ obj-$(CONFIG_DP83TG720_PHY) += dp83tg720.o obj-$(CONFIG_FIXED_PHY) += fixed_phy.o obj-$(CONFIG_ICPLUS_PHY) += icplus.o obj-$(CONFIG_INTEL_XWAY_PHY) += intel-xway.o -obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o +ifdef CONFIG_ET1011C_RUST_PHY + obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c_rust.o +else + obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o +endif obj-$(CONFIG_LXT_PHY) += lxt.o obj-$(CONFIG_MARVELL_10G_PHY) += marvell10g.o obj-$(CONFIG_MARVELL_PHY) += marvell.o diff --git a/drivers/net/phy/et1011c_rust.rs b/drivers/net/phy/et1011c_rust.rs new file mode 100644 index 000000000000..7b8ae3bf492c --- /dev/null +++ b/drivers/net/phy/et1011c_rust.rs @@ -0,0 +1,75 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (C) 2026 Artem Lytkin + +//! Rust LSI ET1011C PHY driver +//! +//! C version of this driver: [`drivers/net/phy/et1011c.c`](./et1011c.c) + +use kernel::{ + net::phy::{self, reg::C22, DeviceId, Driver}, + prelude::*, + uapi, +}; + +kernel::module_phy_driver! { + drivers: [PhyET1011C], + device_table: [ + DeviceId::new_with_driver::() + ], + name: "rust_et1011c_phy", + authors: ["Artem Lytkin "], + description: "Rust LSI ET1011C PHY driver", + license: "GPL", +} + +const ET1011C_STATUS_REG: C22 = C22::vendor_specific::<0x1A>(); +const ET1011C_CONFIG_REG: C22 = C22::vendor_specific::<0x16>(); + +const ET1011C_SPEED_MASK: u16 = 0x0300; +const ET1011C_GIGABIT_SPEED: u16 = 0x0200; +const ET1011C_TX_FIFO_MASK: u16 = 0x3000; +const ET1011C_TX_FIFO_DEPTH_16: u16 = 0x1000; +const ET1011C_GMII_INTERFACE: u16 = 0x0002; +const ET1011C_SYS_CLK_EN: u16 = 0x0010; + +const BMCR_FULLDPLX: u16 = uapi::BMCR_FULLDPLX as u16; +const BMCR_SPEED100: u16 = uapi::BMCR_SPEED100 as u16; +const BMCR_SPEED1000: u16 = uapi::BMCR_SPEED1000 as u16; +const BMCR_ANENABLE: u16 = uapi::BMCR_ANENABLE as u16; +const BMCR_RESET: u16 = uapi::BMCR_RESET as u16; + +struct PhyET1011C; + +#[vtable] +impl Driver for PhyET1011C { + const NAME: &'static CStr = c"ET1011C"; + const PHY_DEVICE_ID: DeviceId = DeviceId::new_with_model_mask(0x0282f014); + + fn config_aneg(dev: &mut phy::Device) -> Result { + let ctl = dev.read(C22::BMCR)?; + let ctl = ctl & !(BMCR_FULLDPLX | BMCR_SPEED100 | BMCR_SPEED1000 | BMCR_ANENABLE); + dev.write(C22::BMCR, ctl | BMCR_RESET)?; + dev.genphy_config_aneg() + } + + fn read_status(dev: &mut phy::Device) -> Result { + let old_speed = dev.speed(); + dev.genphy_read_status::()?; + + if old_speed != dev.speed() { + let val = dev.read(ET1011C_STATUS_REG)?; + if (val & ET1011C_SPEED_MASK) == ET1011C_GIGABIT_SPEED { + let cfg = dev.read(ET1011C_CONFIG_REG)?; + let cfg = cfg & !ET1011C_TX_FIFO_MASK; + dev.write( + ET1011C_CONFIG_REG, + cfg | ET1011C_GMII_INTERFACE + | ET1011C_SYS_CLK_EN + | ET1011C_TX_FIFO_DEPTH_16, + )?; + } + } + + Ok(0) + } +} -- 2.43.0