From: Javen Xu RTL8116AF is a multi-function device. Functions 2 to 7 are hidden from the PCI core and return an all-ones response when their vendor ID is read, so they are not enumerated as normal PCI functions. However, these hidden functions can still affect platform power management. If they are left in D0 or keep ASPM disabled, the platform may fail to enter the low-power s0ix state and the CPU package may fail to enter Package C10. Put functions 2 to 7 into D3hot and enable ASPM on their PCIe link control register. Since these functions are hidden, access their configuration space through pci_bus_read_config_dword() / pci_bus_write_config_dword() using the same slot and the target function numbers. Ignore functions that return a PCI error response when reading their configuration space. Signed-off-by: Javen Xu --- Changes in v2: - no changes --- drivers/net/ethernet/realtek/r8169_main.c | 31 +++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/drivers/net/ethernet/realtek/r8169_main.c b/drivers/net/ethernet/realtek/r8169_main.c index a49e7a8d8f4d..bc00cdc3add6 100644 --- a/drivers/net/ethernet/realtek/r8169_main.c +++ b/drivers/net/ethernet/realtek/r8169_main.c @@ -356,6 +356,9 @@ enum rtl_registers { #define LINK_SPEED_CHANGE_EN BIT(14) #define LTR_SNOOP_EN GENMASK(15, 14) #define LTR_MSG_EN BIT(0) +#define RTL8116AF_FUNC_PM_CSR 0x80 +#define RTL8116AF_FUNC_EXP_LNKCTL 0x44 +#define RTL_PM_D3HOT GENMASK(1, 0) }; enum rtl8168_8101_registers { @@ -3731,6 +3734,33 @@ static void rtl_hw_start_8168ep_3(struct rtl8169_private *tp) r8168_mac_ocp_modify(tp, 0xe860, 0x0000, 0x0080); } +static void rtl_disable_hidden_function(struct pci_dev *pdev) +{ + unsigned int slot = PCI_SLOT(pdev->devfn); + struct pci_bus *bus = pdev->bus; + unsigned int devfn; + int func; + int ret; + u32 val; + + for (func = 2; func < 8; func++) { + devfn = PCI_DEVFN(slot, func); + + ret = pci_bus_read_config_dword(bus, devfn, RTL8116AF_FUNC_PM_CSR, &val); + if (!ret && !PCI_POSSIBLE_ERROR(val)) { + val &= ~(PCI_PM_CTRL_STATE_MASK | PCI_PM_CTRL_PME_ENABLE); + val |= (RTL_PM_D3HOT | PCI_PM_CTRL_PME_ENABLE); + pci_bus_write_config_dword(bus, devfn, RTL8116AF_FUNC_PM_CSR, val); + } + + ret = pci_bus_read_config_dword(bus, devfn, RTL8116AF_FUNC_EXP_LNKCTL, &val); + if (!ret && !PCI_POSSIBLE_ERROR(val)) { + val |= PCI_EXP_LNKCTL_ASPMC; + pci_bus_write_config_dword(bus, devfn, RTL8116AF_FUNC_EXP_LNKCTL, val); + } + } +} + static void rtl_hw_start_8117(struct rtl8169_private *tp) { static const struct ephy_info e_info_8117[] = { @@ -3789,6 +3819,7 @@ static void rtl_hw_start_8117(struct rtl8169_private *tp) r8168_mac_ocp_write(tp, 0xc094, 0x0000); r8168_mac_ocp_write(tp, 0xc09e, 0x0000); + rtl_disable_hidden_function(tp->pci_dev); /* firmware is for MAC only */ r8169_apply_firmware(tp); } -- 2.43.0