Receive Interrupt Watchdog Timer is an RX interrupt coalescing mechanism used by some variants of dwmac. It allows waiting a bit before triggering the rx interrupts, allowing for batch processing. The RIWT is configured with a granularity of 256 stmmac clk ticks. Let's add a comment for that and wrap the raw "1000000" into USEC_PER_SEC, as we're computing "how many clock cycles in one microsec" with that step. Signed-off-by: Maxime Chevallier --- drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c index 92585d27ab88..eebfd6976aaa 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_ethtool.c @@ -759,7 +759,10 @@ static u32 stmmac_usec2riwt(u32 usec, struct stmmac_priv *priv) return 0; } - return (usec * (clk / 1000000)) / 256; + /* Receive Interrupt Watchdog Timer (riwt) has a resolution of 256 + * ticks. + */ + return (usec * (clk / USEC_PER_SEC)) / 256; } static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) @@ -772,7 +775,7 @@ static u32 stmmac_riwt2usec(u32 riwt, struct stmmac_priv *priv) return 0; } - return (riwt * 256) / (clk / 1000000); + return (riwt * 256) / (clk / USEC_PER_SEC); } static int __stmmac_get_coalesce(struct net_device *dev, -- 2.55.0