With further testing with 2.5G NIC, it was discovered that the PHY require the C45 OPs to configure and restart ANEG or speed higher than 1G doesn't function correctly. To force C45 OPs with generic PHY function, clear the C22 bit from devices_in_package bitmask. Fixes: 830877d89edc ("net: phy: Add support for Aeonsemi AS21xxx PHYs") Signed-off-by: Christian Marangi --- drivers/net/phy/as21xxx.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/phy/as21xxx.c b/drivers/net/phy/as21xxx.c index 97ca37c6929f..a6686b4908c6 100644 --- a/drivers/net/phy/as21xxx.c +++ b/drivers/net/phy/as21xxx.c @@ -616,6 +616,13 @@ static int as21xxx_probe(struct phy_device *phydev) if (ret) return ret; + /* Even if PHY declare support for Clause 22 register, + * Clause 45 register should be used for ANEG configuration + * and restart. Clear the C22 bit for devices_in_package to + * force C45 generic OPs in generic PHY ANGE OPs. + */ + phydev->c45_ids.devices_in_package &= ~BIT(0); + ret = aeon_ipc_sync_parity(phydev, priv); if (ret) return ret; -- 2.53.0