Document support for Airoha AN8855 PBUS MDIO. Airoha AN8855 Switch expose a way to access internal PHYs via Switch register. This is named internally PBUS and does the function of an MDIO bus for the internal PHYs. It does support a maximum of 5 PHYs (matching the number of port the Switch support) Signed-off-by: Christian Marangi --- .../bindings/net/airoha,an8855-mdio.yaml | 57 +++++++++++++++++++ 1 file changed, 57 insertions(+) create mode 100644 Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml diff --git a/Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml b/Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml new file mode 100644 index 000000000000..c873103d2b66 --- /dev/null +++ b/Documentation/devicetree/bindings/net/airoha,an8855-mdio.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/airoha,an8855-mdio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Airoha AN8855 PBUS MDIO + +maintainers: + - Christian Marangi + +description: + Airoha AN8855 Switch expose a way to access internal PHYs via + Switch register. This is named internally PBUS and does the function + of an MDIO bus for the internal PHYs. + + It does support a maximum of 5 PHYs (matching the number of port + the Switch support) + +$ref: /schemas/net/mdio.yaml# + +properties: + compatible: + const: airoha,an8855-mdio + +required: + - compatible + +unevaluatedProperties: false + +examples: + - | + mdio { + compatible = "airoha,an8855-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + internal_phy1: phy@1 { + reg = <1>; + }; + + internal_phy2: phy@2 { + reg = <2>; + }; + + internal_phy3: phy@3 { + reg = <3>; + }; + + internal_phy4: phy@4 { + reg = <4>; + }; + + internal_phy5: phy@5 { + reg = <5>; + }; + }; -- 2.48.1