(Patches split per file for review, see cover letter for more information) Signed-off-by: Lachlan Hodges --- drivers/net/wireless/morsemicro/mm81x/hif.h | 116 ++++++++++++++++++++ 1 file changed, 116 insertions(+) create mode 100644 drivers/net/wireless/morsemicro/mm81x/hif.h diff --git a/drivers/net/wireless/morsemicro/mm81x/hif.h b/drivers/net/wireless/morsemicro/mm81x/hif.h new file mode 100644 index 000000000000..73c23a39d14b --- /dev/null +++ b/drivers/net/wireless/morsemicro/mm81x/hif.h @@ -0,0 +1,116 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) 2017-2026 Morse Micro + */ + +#ifndef _MM81X_HIF_H_ +#define _MM81X_HIF_H_ + +#include "core.h" + +struct mm81x_skbq; + +#define MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM (15) +#define MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM (29) +#define MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE \ + BIT(MM81X_HIF_BYPASS_TX_STATUS_IRQ_NUM) +#define MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE \ + BIT(MM81X_HIF_BYPASS_CMD_RESP_IRQ_NUM) + +/* Hardware IF interrupt mask. We may use any interrupts in this range */ +#define MM81X_HIF_IRQ_MASK_ALL \ + (GENMASK(13, 0) | MM81X_HIF_IRQ_BYPASS_TX_STATUS_AVAILABLE | \ + MM81X_HIF_IRQ_BYPASS_CMD_RESP_AVAILABLE) + +enum mm81x_hif_flags { + MM81X_HIF_FLAGS_DIR_TO_HOST = BIT(0), + MM81X_HIF_FLAGS_DIR_TO_CHIP = BIT(1), + MM81X_HIF_FLAGS_COMMAND = BIT(2), + MM81X_HIF_FLAGS_BEACON = BIT(3), + MM81X_HIF_FLAGS_DATA = BIT(4) +}; + +struct mm81x_hif_ops { + int (*init)(struct mm81x *mm); + void (*flush_tx_data)(struct mm81x *mm); + void (*flush_cmds)(struct mm81x *mm); + void (*finish)(struct mm81x *mm); + void (*skbq_get_tx_qs)(struct mm81x *mm, struct mm81x_skbq **qs, + int *num_qs); + struct mm81x_skbq *(*get_tx_cmd_queue)(struct mm81x *mm); + struct mm81x_skbq *(*get_tx_beacon_queue)(struct mm81x *mm); + struct mm81x_skbq *(*get_tx_mgmt_queue)(struct mm81x *mm); + struct mm81x_skbq *(*get_tx_data_queue)(struct mm81x *mm, int aci); + int (*handle_irq)(struct mm81x *mm, u32 status); + int (*get_tx_buffered_count)(struct mm81x *mm); + int (*get_tx_status_pending_count)(struct mm81x *mm); +}; + +static inline void mm81x_hif_clear_events(struct mm81x *mm) +{ + mm->hif.event_flags = 0; +} + +static inline int mm81x_hif_init(struct mm81x *mm) +{ + return mm->hif.ops->init(mm); +} + +static inline void mm81x_hif_flush_tx_data(struct mm81x *mm) +{ + mm->hif.ops->flush_tx_data(mm); +} + +static inline void mm81x_hif_flush_cmds(struct mm81x *mm) +{ + mm->hif.ops->flush_cmds(mm); +} + +static inline void mm81x_hif_finish(struct mm81x *mm) +{ + mm->hif.ops->finish(mm); +} + +static inline void mm81x_hif_skbq_get_tx_qs(struct mm81x *mm, + struct mm81x_skbq **qs, int *num_qs) +{ + mm->hif.ops->skbq_get_tx_qs(mm, qs, num_qs); +} + +static inline struct mm81x_skbq *mm81x_hif_get_tx_cmd_queue(struct mm81x *mm) +{ + return mm->hif.ops->get_tx_cmd_queue(mm); +} + +static inline struct mm81x_skbq *mm81x_hif_get_tx_beacon_queue(struct mm81x *mm) +{ + return mm->hif.ops->get_tx_beacon_queue(mm); +} + +static inline struct mm81x_skbq *mm81x_hif_get_tx_mgmt_queue(struct mm81x *mm) +{ + return mm->hif.ops->get_tx_mgmt_queue(mm); +} + +static inline struct mm81x_skbq *mm81x_hif_get_tx_data_queue(struct mm81x *mm, + int aci) +{ + return mm->hif.ops->get_tx_data_queue(mm, aci); +} + +static inline int mm81x_hif_handle_irq(struct mm81x *mm, u32 status) +{ + return mm->hif.ops->handle_irq(mm, status); +} + +static inline int mm81x_hif_get_tx_buffered_count(struct mm81x *mm) +{ + return mm->hif.ops->get_tx_buffered_count(mm); +} + +static inline int mm81x_hif_get_tx_status_pending_count(struct mm81x *mm) +{ + return mm->hif.ops->get_tx_status_pending_count(mm); +} + +#endif /* _MM81X_HIF_H_ */ -- 2.43.0