Add DPC_DPCENABLE, DPC_GDCENABLE, and DPC_BLCENABLE enable bits to ISC_SAMA7G5_PIPELINE macro to prevent isc_sama7g5_adapt_pipeline() from masking out DPC modules during pipeline configuration Signed-off-by: Balamanikandan Gunasundar --- drivers/media/platform/microchip/microchip-sama7g5-isc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/microchip/microchip-sama7g5-isc.c b/drivers/media/platform/microchip/microchip-sama7g5-isc.c index 36c3f4ba1962..03f7a46acd47 100644 --- a/drivers/media/platform/microchip/microchip-sama7g5-isc.c +++ b/drivers/media/platform/microchip/microchip-sama7g5-isc.c @@ -59,7 +59,8 @@ #define ISC_SAM9X7_MAX_SUPPORT_HEIGHT 1920 #define ISC_SAMA7G5_PIPELINE \ - (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ + (DPC_DPCENABLE | DPC_GDCENABLE | DPC_BLCENABLE | \ + WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \ CBC_ENABLE | SUB422_ENABLE | SUB420_ENABLE) /* This is a list of the formats that the ISC can *output* */ -- 2.34.1