PCI interrupt-map entries currently use the GICv2/v3 SPI type and an IRQ number with the SPI base subtracted. GICv5 uses a different SPI type (matching the hardware) and zero-based SPI numbers. Use the GICv5 encoding for its INTx entries while retaining the existing encoding for other GICs. Signed-off-by: Sascha Bischoff --- arm64/pci.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/arm64/pci.c b/arm64/pci.c index db87db8b..0ba2f9c9 100644 --- a/arm64/pci.c +++ b/arm64/pci.c @@ -84,6 +84,7 @@ void pci__generate_fdt_nodes(void *fdt, struct kvm *kvm) u8 pin = pci_hdr->irq_pin; u8 irq = pci_hdr->irq_line; u32 irq_flags = pci_hdr->irq_type; + u32 int_type, int_id; /* * Avoid adding entries in "interrupt-map" for devices that @@ -95,6 +96,14 @@ void pci__generate_fdt_nodes(void *fdt, struct kvm *kvm) continue; } + if (!gic__is_v5()) { + int_type = GIC_FDT_IRQ_TYPE_SPI; + int_id = irq - GIC_SPI_IRQ_BASE; + } else { + int_type = GICV5_IRQ_TYPE_SPI; + int_id = irq; + } + *entry = (struct of_interrupt_map_entry) { .pci_irq_mask = { .pci_addr = { @@ -108,8 +117,8 @@ void pci__generate_fdt_nodes(void *fdt, struct kvm *kvm) .gic_addr_hi = 0, .gic_addr_lo = 0, .gic_irq = { - .type = cpu_to_fdt32(GIC_FDT_IRQ_TYPE_SPI), - .num = cpu_to_fdt32(irq - GIC_SPI_IRQ_BASE), + .type = cpu_to_fdt32(int_type), + .num = cpu_to_fdt32(int_id), .flags = cpu_to_fdt32(irq_flags), }, }; -- 2.34.1