| 2025-10-26 10:17 UTC |
dt-bindings: net: sparx5: Narrow properly LAN969x register space windows |
2 |
krzysztof.kozlowski@linaro.org |
finished
in 48m0s
|
| 2025-10-26 10:16 UTC |
dt-bindings: net: sparx5: Narrow properly LAN969x register space windows |
1 |
krzysztof.kozlowski@linaro.org |
finished
in 45m0s
|
| 2025-10-23 19:13 UTC |
phy: mscc: Fix PTP for VSC8574 and VSC8572 |
5 |
horatiu.vultur@microchip.com |
finished
in 48m0s
|
| 2025-10-17 06:48 UTC |
phy: mscc: Fix PTP for VSC8574 and VSC8572 |
4 |
horatiu.vultur@microchip.com |
finished
in 44m0s
|
| 2025-10-03 12:35 UTC |
net: sparx5/lan969x: fix flooding configuration on bridge join/leave |
1 |
daniel.machon@microchip.com |
finished
in 44m0s
|
| 2025-09-29 09:13 UTC |
phy: mscc: Fix PTP for VSC8574 and VSC8572 |
3 |
horatiu.vultur@microchip.com |
finished
in 45m0s
|
| 2025-09-25 13:19 UTC |
dt-bindings: net: sparx5: correct LAN969x register space windows |
1 |
robert.marko@sartura.hr |
finished
in 56m0s
|
| 2025-09-17 11:49 UTC |
net: sparx5/lan969x: Add support for ethtool pause parameters |
1 |
daniel.machon@microchip.com |
finished
in 47m0s
|
| 2025-09-17 11:33 UTC |
phy: mscc: Fix PTP for vsc8574 and VSC8572 |
2 |
horatiu.vultur@microchip.com |
finished
in 45m0s
|
| 2025-09-17 11:00 UTC |
net: ethernet: microchip: sparx5: make it selectable for ARCH_LAN969X |
1 |
robert.marko@sartura.hr |
finished
in 35m0s
|
| 2025-09-15 08:01 UTC |
phy: mscc: Fix PTP for vsc8574 and VSC8572 |
1 |
horatiu.vultur@microchip.com |
finished
in 44m0s
|
| 2025-08-21 08:30 UTC |
dt-bindings: net: litex,liteeth: Correct example indentation |
1 |
krzysztof.kozlowski@linaro.org |
finished
in 35m0s
|