| Published | Title | Version | Author | Status |
|---|---|---|---|---|
| 2025-11-27 08:51 UTC | RISC-V: KVM: Transparent huge page support | 4 | liu.xuemei1@zte.com.cn | in progress |
| 2025-11-22 07:50 UTC | RISC-V: KVM: Allow to downgrade HGATP mode via SATP mode | 1 | fangyu.yu@linux.alibaba.com | finished in 49m0s |
| 2025-11-21 13:35 UTC | RISC-V: KVM: Fix guest page fault within HLV* instructions | 3 | fangyu.yu@linux.alibaba.com | finished in 1h0m0s |
| 2025-11-19 23:53 UTC | mm/huge_memory: fix NULL pointer deference when splitting folio | 2 | richard.weiyang@gmail.com | finished in 26m0s |
| 2025-11-17 08:45 UTC | RISC-V: KVM: Flush VS-stage TLB after VCPU migration for split two-stage TLBs | 4 | minachou@andestech.com | finished in 1h0m0s |
| 2025-11-13 01:45 UTC | riscv: Memory type control for platforms with physical memory aliases | 3 | samuel.holland@sifive.com |
finished
in 37m0s
[1 findings] |
| 2025-11-11 13:55 UTC | RISC-V: KVM: Fix guest page fault within HLV* instructions | 2 | fangyu.yu@linux.alibaba.com | finished in 45m0s |
| 2025-11-11 04:49 UTC | RISC-V: KVM: Transparent huge page support | 3 | liu.xuemei1@zte.com.cn | finished in 36m0s |
| 2025-11-05 11:08 UTC | asm-generic: Remove pud_user() from pgtable-nopmd.h | 2 | christophe.leroy@csgroup.eu | finished in 46m0s |
| 2025-10-31 03:12 UTC | KVM: LoongArch: selftests: Add timer test case | 1 | maobibo@loongson.cn | finished in 51m0s |
| 2025-10-30 20:09 UTC | KVM: x86/mmu: TDX post-populate cleanups | 4 | seanjc@google.com | finished in 3h53m0s |
| 2025-10-28 00:28 UTC | KVM: TDX: Take MMU lock around tdh_vp_init() | 1 | rick.p.edgecombe@intel.com | skipped |
| 2025-10-26 09:19 UTC | riscv: Fix memory leak in module_frob_arch_sections() | 1 | linmq006@gmail.com | finished in 46m0s |
| 2025-10-23 03:25 UTC | RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries | 3 | minachou@andestech.com | finished in 38m0s |
| 2025-10-21 14:21 UTC | RISC-V: KVM: Remove automatic I/O mapping for VM_PFNMAP | 2 | fangyu.yu@linux.alibaba.com | finished in 46m0s |
| 2025-10-21 08:31 UTC | RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries | 2 | minachou@andestech.com | finished in 51m0s |
| 2025-10-20 13:08 UTC | RISC-V: KVM: Remove automatic I/O mapping for VM_PFNMAP | 1 | fangyu.yu@linux.alibaba.com | finished in 49m0s |
| 2025-10-17 00:32 UTC | KVM: x86/mmu: TDX post-populate cleanups | 3 | seanjc@google.com | finished in 3h39m0s |
| 2025-10-16 01:26 UTC | RISC-V: KVM: Read HGEIP CSR on the correct cpu | 1 | fangyu.yu@linux.alibaba.com | finished in 54m0s |
| 2025-10-16 00:17 UTC | RISC-V: KVM: Fix check for local interrupts on riscv32 | 1 | samuel.holland@sifive.com | finished in 40m0s |
| 2025-10-09 01:57 UTC | riscv: Memory type control for platforms with physical memory aliases | 2 | samuel.holland@sifive.com | skipped |
| 2025-10-02 03:34 UTC | RISC-V: KVM: flush VS-stage TLB after VCPU migration to prevent stale entries | 1 | ben717@andestech.com | finished in 39m0s |