Published Title Version Author Status
2025-12-19 14:04 UTC RDMA/rxe: let rxe_reclassify_recv_socket() call sk_owner_put() 1 metze@samba.org finished in 3h53m0s
2025-12-01 22:57 UTC cifs: Miscellaneous prep patches for rewrite of I/O layer 6 dhowells@redhat.com finished in 29m0s
2025-12-01 09:49 UTC cifs: Miscellaneous prep patches for rewrite of I/O layer 5 dhowells@redhat.com finished in 4h2m0s
2025-11-27 10:56 UTC RDMA/rxe: reclassify sockets in order to avoid false positives from lockdep 3 metze@samba.org finished in 3h53m0s
2025-11-26 15:08 UTC RDMA/siw: reclassify sockets in order to avoid false positives from lockdep 2 metze@samba.org finished in 4h4m0s
2025-11-26 15:07 UTC RDMA/rxe: reclassify sockets in order to avoid false positives from lockdep 2 metze@samba.org finished in 3h58m0s
2025-11-26 11:19 UTC io_uring/net: wire up support for sk->sk_prot->uring_cmd() with SOCKET_URING_OP_PASSTHROUGH_FLAG 1 metze@samba.org skipped
2025-11-26 11:14 UTC net: define IPPROTO_SMBDIRECT and SOL_SMBDIRECT constants 1 metze@samba.org skipped
2025-11-26 10:42 UTC RDMA/siw: reclassify sockets in order to avoid false positives from lockdep 1 metze@samba.org finished in 4h21m0s
2025-11-26 10:42 UTC RDMA/rxe: reclassify sockets in order to avoid false positives from lockdep 1 metze@samba.org finished in 4h38m0s
2025-11-24 14:28 UTC net: introduce QUIC infrastructure and core subcomponents 5 lucien.xin@gmail.com finished in 1h7m0s
2025-11-24 12:42 UTC cifs: Miscellaneous prep patches for rewrite of I/O layer 4 dhowells@redhat.com skipped
2025-11-23 23:52 UTC cifs: Miscellaneous prep patches for rewrite of I/O layer 3 dhowells@redhat.com skipped
2025-11-17 08:59 UTC ksmbd: server: avoid busy polling in accept loop 3 dqfext@gmail.com finished in 4h6m0s
2025-11-11 10:47 UTC ksmbd: server: avoid busy polling in accept loop 2 dqfext@gmail.com finished in 3h47m0s
2025-10-29 14:35 UTC net: introduce QUIC infrastructure and core subcomponents 4 lucien.xin@gmail.com finished in 40m0s
2025-09-18 22:34 UTC net: introduce QUIC infrastructure and core subcomponents 3 lucien.xin@gmail.com finished in 36m0s
2025-08-18 14:04 UTC net: introduce QUIC infrastructure and core subcomponents 2 lucien.xin@gmail.com finished in 1h43m0s
2025-07-05 19:31 UTC net: introduce QUIC infrastructure and core subcomponents 1 lucien.xin@gmail.com finished in 3h43m0s