Published Title Version Author Status
2025-08-13 08:14 UTC ethtool: introduce PHY MSE diagnostics UAPI and drivers 1 o.rempel@pengutronix.de skipped
2025-08-12 11:12 UTC Add Si3474 PSE controller driver 6 piotr.kubik@adtran.com skipped
2025-08-12 11:05 UTC PRU-ICSSM Ethernet Driver 13 parvathi@couthit.com finished in 1h49m0s
2025-08-04 15:07 UTC Add Si3474 PSE controller driver 6 piotr.kubik@adtran.com skipped
2025-07-30 17:21 UTC netlink: specs: ethtool: fix module EEPROM input/output arguments 1 kuba@kernel.org finished in 1h26m0s
2025-07-24 07:23 UTC PRU-ICSSM Ethernet Driver 12 parvathi@couthit.com finished in 1h33m0s
2025-07-22 13:25 UTC PRU-ICSSM Ethernet Driver 11 parvathi@couthit.com finished in 1h33m0s
2025-07-22 12:16 UTC net: phy: Introduce PHY ports representation 10 maxime.chevallier@bootlin.com skipped
2025-07-17 23:43 UTC ethtool: rss: support creating and removing contexts via Netlink 1 kuba@kernel.org skipped
2025-07-17 10:37 UTC Documentation: networking: add detailed guide on Ethernet flow control configuration 1 o.rempel@pengutronix.de finished in 3h40m0s
2025-07-17 07:30 UTC net: phy: Introduce PHY ports representation 9 maxime.chevallier@bootlin.com skipped
2025-07-16 00:03 UTC ethtool: rss: support RSS_SET via Netlink 3 kuba@kernel.org skipped
2025-07-14 22:27 UTC ethtool: rss: support RSS_SET via Netlink 2 kuba@kernel.org skipped
2025-07-11 11:24 UTC Add Si3474 PSE controller driver 5 piotr.kubik@adtran.com skipped
2025-07-11 01:52 UTC ethtool: rss: support RSS_SET via Netlink 1 kuba@kernel.org skipped
2025-07-10 13:45 UTC net: phy: Introduce PHY ports representation 8 maxime.chevallier@bootlin.com skipped
2025-07-10 06:22 UTC netdevsim: add support for PHY devices 3 maxime.chevallier@bootlin.com finished in 3h38m0s
2025-07-09 15:32 UTC net: pse-pd: pd692x0: reduce stack usage in pd692x0_setup_pi_matrix 1 arnd@kernel.org finished in 3h39m0s
2025-07-08 11:55 UTC netdevsim: add support for PHY devices 2 maxime.chevallier@bootlin.com finished in 3h34m0s
2025-07-02 08:28 UTC netdevsim: add support for PHY devices 1 maxime.chevallier@bootlin.com finished in 3h35m0s
2025-06-30 14:57 UTC Add Si3474 PSE controller driver 4 piotr.kubik@adtran.com skipped
2025-06-30 14:33 UTC net: phy: Introduce PHY ports representation 7 maxime.chevallier@bootlin.com skipped