| 2025-08-19 06:32 UTC |
net: gso: restore outer ip ids correctly |
2 |
richardbgobert@gmail.com |
finished
in 3h52m0s
|
| 2025-08-15 20:18 UTC |
net: dsa: b53: fix reserved register access in b53_fdb_dump() |
1 |
jonas.gorski@gmail.com |
finished
in 1h47m0s
|
| 2025-08-15 13:59 UTC |
Add ethernet support for RPi5 |
1 |
svarbanov@suse.de |
finished
in 1h33m0s
|
| 2025-08-15 01:56 UTC |
[net-next] eth: nfp: Remove u64_stats_update_begin()/end() for stats fetch |
1 |
lirongqing@baidu.com |
finished
in 1h46m0s
|
| 2025-08-14 00:25 UTC |
net: dsa: b53: mmap: Add bcm63268 GPHY power control |
1 |
kylehendrydev@gmail.com |
finished
in 1h35m0s
|
| 2025-08-13 15:26 UTC |
net: dsa: microchip: Prevent overriding of HSR port forwarding |
1 |
frieder@fris.de |
finished
in 1h45m0s
|
| 2025-08-11 16:59 UTC |
net: mdio: mdio-bcm-unimac: Refine incorrect clock message |
1 |
florian.fainelli@broadcom.com |
finished
in 1h36m0s
|
| 2025-07-30 20:25 UTC |
net: mdio: mdio-bcm-unimac: Correct rate fallback logic |
2 |
florian.fainelli@broadcom.com |
finished
in 1h32m0s
|
| 2025-07-30 02:03 UTC |
net: dsa: b53: mmap: Add bcm63268 GPHY power control |
1 |
kylehendrydev@gmail.com |
finished
in 2h11m0s
|
| 2025-07-29 21:31 UTC |
net: mdio: mdio-bcm-unimac: Correct rate fallback logic |
1 |
florian.fainelli@broadcom.com |
finished
in 1h35m0s
|
| 2025-07-24 14:39 UTC |
net: phy: realtek: Reset after clock enable |
2 |
sebastian.reichel@collabora.com |
finished
in 1h35m0s
|
| 2025-07-24 03:52 UTC |
net: dsa: b53: mmap: Add bcm63xx EPHY power control |
2 |
kylehendrydev@gmail.com |
finished
in 1h27m0s
|
| 2025-07-21 11:14 UTC |
net: add WoL from PHY support for stm32mp135f-dk |
1 |
gatien.chevallier@foss.st.com |
finished
in 1h31m0s
|
| 2025-07-18 21:22 UTC |
net: bcmasp: Restore programming of TX map vector register |
1 |
florian.fainelli@broadcom.com |
finished
in 3h37m0s
|
| 2025-07-17 18:09 UTC |
net: bcmasp: Add support for re-starting auto-negotiation |
1 |
florian.fainelli@broadcom.com |
finished
in 3h39m0s
|
| 2025-07-16 00:29 UTC |
net: dsa: b53: mmap: Add bcm63xx EPHY power control |
1 |
kylehendrydev@gmail.com |
finished
in 3h37m0s
|
| 2025-07-08 09:01 UTC |
net: phy: bcm54811: PHY initialization |
7 |
kamilh@axis.com |
skipped
|
| 2025-07-04 17:48 UTC |
net: phy: realtek: Reset after clock enable |
1 |
sebastian.reichel@collabora.com |
finished
in 6h6m0s
|
| 2025-07-04 08:35 UTC |
net: phy: bcm54811: Fix the PHY initialization |
6 |
kamilh@axis.com |
finished
in 3h35m0s
|
| 2025-07-02 09:24 UTC |
net: bcmgenet: Initialize u64 stats seq counter |
2 |
ryotkkr98@gmail.com |
finished
in 4h3m0s
|
| 2025-07-01 07:50 UTC |
net: phy: bcm54811: Fix the PHY initialization |
5 |
kamilh@axis.com |
finished
in 3h50m0s
|
| 2025-06-30 13:58 UTC |
net: phy: bcm54811: Fix the PHY initialization |
4 |
kamilh@axis.com |
finished
in 3h40m0s
|
| 2025-06-30 11:30 UTC |
net: phy: bcm54811: Fix the PHY initialization |
3 |
kamilh@axis.com |
finished
in 3h48m0s
|
| 2025-06-29 11:41 UTC |
net: bcmgenet: Initialize u64 stats seq counter |
1 |
ryotkkr98@gmail.com |
skipped
|
| 2025-06-27 11:23 UTC |
net: phy: bcm54811: Fix the PHY initialization |
2 |
kamilh@axis.com |
finished
in 3h37m0s
|
| 2025-06-26 11:56 UTC |
net: phy: bcm54811: Fix the PHY initialization |
1 |
kamilh@axis.com |
skipped
|
| 2025-06-26 11:16 UTC |
net: phy: bcm54811: Fix the PHY initialization |
3 |
kamilh@axis.com |
skipped
|